Home
last modified time | relevance | path

Searched refs:regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h12928 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10749 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10728 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12054 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11851 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12844 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h12064 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12709 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12302 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13440 #define regDSC_TOP2_DSC_DEBUG_CONTROL_BASE_IDX … macro