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Searched refs:regDSCL0_DSCL_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h3623 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h4526 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h4505 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3301 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h4685 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h3776 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h3302 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h3535 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h3375 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h3996 #define regDSCL0_DSCL_CONTROL_BASE_IDX … macro