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Searched refs:regCP_MEC_ISA_CNTL (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c4567 tmp = RREG32_SOC15(GC, 0, regCP_MEC_ISA_CNTL); in gfx_v11_0_select_cp_fw_arch()
4569 WREG32_SOC15(GC, 0, regCP_MEC_ISA_CNTL, tmp); in gfx_v11_0_select_cp_fw_arch()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h6533 #define regCP_MEC_ISA_CNTL … macro
H A Dgc_11_0_0_offset.h7760 #define regCP_MEC_ISA_CNTL … macro
H A Dgc_11_0_3_offset.h8064 #define regCP_MEC_ISA_CNTL … macro