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Searched refs:regBIF_CFG_DEV0_EPF5_0_MAX_LATENCY_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_11_0_offset.h3059 #define regBIF_CFG_DEV0_EPF5_0_MAX_LATENCY_BASE_IDX … macro
H A Dnbio_7_7_0_offset.h9077 #define regBIF_CFG_DEV0_EPF5_0_MAX_LATENCY_BASE_IDX … macro
H A Dnbio_7_2_0_offset.h10479 #define regBIF_CFG_DEV0_EPF5_0_MAX_LATENCY_BASE_IDX … macro