Searched refs:psr_context (Results 1 – 11 of 11) sorted by relevance
170 struct psr_context *psr_context) in dce_dmcu_setup_psr() argument192 switch (psr_context->controllerId) { in dce_dmcu_setup_psr()242 psr_context->rfb_update_auto_en; in dce_dmcu_setup_psr()257 psr_context->skipPsrWaitForPllLock; in dce_dmcu_setup_psr()261 psr_context->numberOfControllers; in dce_dmcu_setup_psr()601 struct psr_context *psr_context) in dcn10_dmcu_setup_psr() argument627 switch (psr_context->controllerId) { in dcn10_dmcu_setup_psr()667 if (psr_context->allow_smu_optimizations) in dcn10_dmcu_setup_psr()680 psr_context->rfb_update_auto_en; in dcn10_dmcu_setup_psr()696 psr_context->skipPsrWaitForPllLock; in dcn10_dmcu_setup_psr()[all …]
294 struct psr_context *psr_context, in dmub_psr_copy_settings() argument324 psr_context->psrExitLinkTrainingRequired); in dmub_psr_copy_settings()328 psr_context->sdpTransmitLineNumDeadline); in dmub_psr_copy_settings()336 copy_settings_data->dpphy_inst = psr_context->transmitterId; in dmub_psr_copy_settings()337 copy_settings_data->aux_inst = psr_context->channel; in dmub_psr_copy_settings()338 copy_settings_data->digfe_inst = psr_context->engineId; in dmub_psr_copy_settings()339 copy_settings_data->digbe_inst = psr_context->transmitterId; in dmub_psr_copy_settings()358 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()361 copy_settings_data->frame_delay = psr_context->frame_delay; in dmub_psr_copy_settings()370 if (psr_context->su_granularity_required == 0) in dmub_psr_copy_settings()[all …]
41 struct psr_context *psr_context, uint8_t panel_inst);
662 struct psr_context *psr_context) in edp_setup_psr() argument736 psr_context->su_granularity_required = in edp_setup_psr()738 psr_context->su_y_granularity = in edp_setup_psr()763 psr_context->controllerId = in edp_setup_psr()771 psr_context->phyType = PHY_TYPE_UNIPHY; in edp_setup_psr()791 psr_context->numberOfControllers = in edp_setup_psr()797 psr_context->timehyst_frames = 2; in edp_setup_psr()802 psr_context->aux_repeats = 10; in edp_setup_psr()804 psr_context->psr_level.u32all = 0; in edp_setup_psr()841 psr_context->frame_delay = 0; in edp_setup_psr()[all …]
50 struct psr_context *psr_context);
68 struct psr_context *psr_context);
110 struct psr_context psr_context = {0}; in amdgpu_dm_link_setup_psr() local133 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context); in amdgpu_dm_link_setup_psr()
476 struct psr_context *psr_context) in dc_link_setup_psr() argument478 return link->dc->link_srv->edp_setup_psr(link, stream, psr_config, psr_context); in dc_link_setup_psr()
270 struct psr_context *psr_context);
658 struct psr_context { struct
2277 struct psr_context *psr_context);