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Searched refs:phy_clear_bits_mmd (Results 1 – 24 of 24) sorted by relevance

/linux-6.15/drivers/net/phy/mediatek/
H A Dmtk-ge-soc.c402 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
654 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
657 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
665 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
668 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
676 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
679 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
687 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
690 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
975 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
[all …]
/linux-6.15/drivers/net/phy/
H A Dadin1100.c111 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL, in adin_config_aneg()
120 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, ADIN_FORCED_MODE, ADIN_FORCED_MODE_EN); in adin_config_aneg()
135 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_H, in adin_config_aneg()
228 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
H A Dnxp-c45-tja11xx.c824 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_set_rising_or_falling()
844 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_set_rising_and_falling()
853 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_set_rising_and_falling()
1225 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_config_intr()
1230 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_config_intr()
1256 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tja1120_config_intr()
1366 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_cable_test_get_status()
1393 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tja1120_link_change_notify()
1657 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_tja1120_errata()
1823 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tja1103_ptp_enable()
[all …]
H A Ddp83tc811.c151 return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
350 return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_config_init()
H A Dphy-c45.c57 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_resume()
327 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in genphy_c45_an_disable_aneg()
1257 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FSRT_CSR, in genphy_c45_fast_retrain()
1352 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg()
H A Ddp83822.c261 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in dp83822_config_wol()
566 err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in dp83822_config_init()
639 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR, in dp8382x_config_rmii_mode()
673 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR, in dp83826_config_init()
H A Dmicrochip_t1.c1094 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_rgmii_init()
1108 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_rgmii_init()
1118 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_rgmii_init()
1305 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in lan887x_phy_init()
1441 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, LAN887X_DSP_PMA_CONTROL, in lan887x_phy_reset()
1447 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, LAN887X_REG_REG26, in lan887x_phy_reset()
H A Dmarvell-88x2222.c63 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_enable()
90 int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_disable_aneg()
H A Dadin.c278 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode()
324 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode()
461 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_set_fast_down()
H A Dmarvell10g.c315 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, in mv3310_power_up()
379 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1, in mv3310_set_downshift()
626 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, MV_AN_21X0_SERDES_CTRL2, in mv2110_set_mactype()
1379 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in mv3110_set_wol()
H A Dmarvell-88q2xxx.c509 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_config_init()
665 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_resume()
H A Dmicrel.c4925 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_EN, BIT(pin)); in lan8841_ptp_perout_off()
4929 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_DIR, BIT(pin)); in lan8841_ptp_perout_off()
4933 return phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_BUF, BIT(pin)); in lan8841_ptp_perout_off()
4978 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL1, tmp); in lan8841_ptp_remove_event()
4981 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_DATA_SEL2, tmp); in lan8841_ptp_remove_event()
4993 return phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_EN, tmp); in lan8841_ptp_remove_event()
5191 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_BUF, BIT(pin)); in lan8841_ptp_extts_on()
5216 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_EN, BIT(pin)); in lan8841_ptp_extts_off()
5220 ret = phy_clear_bits_mmd(phydev, 2, LAN8841_GPIO_BUF, BIT(pin)); in lan8841_ptp_extts_off()
H A Ddp83867.c504 phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, in dp83867_config_port_mirroring()
778 phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, in dp83867_config_init()
H A Ddp83td510.c493 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_config_intr()
H A Ddp83869.c517 return phy_clear_bits_mmd(phydev, DP83869_DEVADDR, in dp83869_config_port_mirroring()
H A Dmxl-gpy.c764 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, in gpy_set_wol()
H A Dmicrochip_rds_ptp.c1076 return phy_clear_bits_mmd(clock->phydev, PTP_MMD(clock), reg, in mchp_rds_ptp_top_config_intr()
/linux-6.15/drivers/net/phy/realtek/
H A Drealtek_hwmon.c68 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSALRM, 3); in rtl822x_hwmon_init()
/linux-6.15/drivers/net/phy/aquantia/
H A Daquantia_firmware.c280 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_SC, in aqr_fw_boot()
H A Daquantia_main.c975 err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_resume()
1098 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in aqr113c_config_init()
/linux-6.15/drivers/net/phy/qcom/
H A Dqcom-phy-lib.c626 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_hw_control_enable()
H A Dqca808x.c553 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_hw_control_reset()
H A Dqca807x.c326 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, mask); in qca807x_led_hw_control_reset()
/linux-6.15/include/linux/
H A Dphy.h1577 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, in phy_clear_bits_mmd() function