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Searched refs:num_of_levels (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c2494 int num_of_levels = pcie_table->num_of_link_levels; in smu_v13_0_update_pcie_parameters() local
2498 if (!num_of_levels) in smu_v13_0_update_pcie_parameters()
2502 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v13_0_update_pcie_parameters()
2503 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters()
2505 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v13_0_update_pcie_parameters()
2506 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters()
2509 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
2514 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
2522 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c1490 int num_of_levels = pcie_table->num_of_link_levels; in smu_v14_0_2_update_pcie_parameters() local
1494 if (!num_of_levels) in smu_v14_0_2_update_pcie_parameters()
1498 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v14_0_2_update_pcie_parameters()
1499 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v14_0_2_update_pcie_parameters()
1501 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v14_0_2_update_pcie_parameters()
1502 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v14_0_2_update_pcie_parameters()
1505 for (i = 0; i < num_of_levels; i++) { in smu_v14_0_2_update_pcie_parameters()
1510 for (i = 0; i < num_of_levels; i++) { in smu_v14_0_2_update_pcie_parameters()
1518 for (i = 0; i < num_of_levels; i++) { in smu_v14_0_2_update_pcie_parameters()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c579 PPCLK_e clk_id, uint32_t *num_of_levels) in vega12_get_number_of_dpm_level() argument
586 num_of_levels); in vega12_get_number_of_dpm_level()
614 uint32_t i, num_of_levels, clk; in vega12_setup_single_dpm_table() local
616 ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega12_setup_single_dpm_table()
621 dpm_table->count = num_of_levels; in vega12_setup_single_dpm_table()
623 for (i = 0; i < num_of_levels; i++) { in vega12_setup_single_dpm_table()
H A Dvega20_hwmgr.c537 PPCLK_e clk_id, uint32_t *num_of_levels) in vega20_get_number_of_dpm_level() argument
544 num_of_levels); in vega20_get_number_of_dpm_level()
572 uint32_t i, num_of_levels, clk; in vega20_setup_single_dpm_table() local
574 ret = vega20_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega20_setup_single_dpm_table()
579 dpm_table->count = num_of_levels; in vega20_setup_single_dpm_table()
581 for (i = 0; i < num_of_levels; i++) { in vega20_setup_single_dpm_table()