| /linux-6.15/drivers/mtd/nand/ |
| H A D | qpic_common.c | 127 dma_sync_single_for_cpu(nandc->dev, nandc->reg_read_dma, in qcom_nandc_dev_to_mem()
132 dma_sync_single_for_device(nandc->dev, nandc->reg_read_dma, in qcom_nandc_dev_to_mem()
429 vaddr = nandc->reg_read_buf + nandc->reg_read_pos; in qcom_read_reg_dma()
627 dma_unmap_single(nandc->dev, nandc->reg_read_dma, in qcom_nandc_unalloc()
671 nandc->data_buffer = devm_kzalloc(nandc->dev, nandc->buf_size, GFP_KERNEL); in qcom_nandc_alloc()
675 nandc->regs = devm_kzalloc(nandc->dev, sizeof(*nandc->regs), GFP_KERNEL); in qcom_nandc_alloc()
687 dma_map_single(nandc->dev, nandc->reg_read_buf, in qcom_nandc_alloc()
696 nandc->tx_chan = dma_request_chan(nandc->dev, "tx"); in qcom_nandc_alloc()
705 nandc->rx_chan = dma_request_chan(nandc->dev, "rx"); in qcom_nandc_alloc()
730 nandc->bam_txn = qcom_alloc_bam_transaction(nandc); in qcom_nandc_alloc()
[all …]
|
| /linux-6.15/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 312 qcom_write_reg_dma(nandc, &nandc->regs->addr0, NAND_ADDR0, 2, 0); in config_nand_page_read()
316 qcom_write_reg_dma(nandc, &nandc->regs->erased_cw_detect_cfg_clr, in config_nand_page_read()
318 qcom_write_reg_dma(nandc, &nandc->regs->erased_cw_detect_cfg_set, in config_nand_page_read()
372 qcom_write_reg_dma(nandc, &nandc->regs->addr0, NAND_ADDR0, 2, 0); in config_nand_page_write()
1475 nandc->bam_txn = qcom_alloc_bam_transaction(nandc); in qcom_nand_attach_chip()
1910 nandc->regs->orig_cmd1 = cpu_to_le32(nandc->cmd1); in qcom_param_page_type_exec()
1911 nandc->regs->orig_vld = cpu_to_le32(nandc->vld); in qcom_param_page_type_exec()
1926 memset(nandc->data_buffer, 0xff, nandc->buf_count); in qcom_param_page_type_exec()
1930 qcom_read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, in qcom_param_page_type_exec()
2059 nandc->cmd1 = nandc_read(nandc, dev_cmd_reg_addr(nandc, NAND_DEV_CMD1)); in qcom_nandc_setup()
[all …]
|
| /linux-6.15/include/linux/mtd/ |
| H A D | nand-qpic-common.h | 200 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg)) argument
463 void qcom_free_bam_transaction(struct qcom_nand_controller *nandc);
465 void qcom_clear_bam_transaction(struct qcom_nand_controller *nandc);
467 void qcom_nandc_dev_to_mem(struct qcom_nand_controller *nandc, bool is_cpu);
468 int qcom_prepare_bam_async_desc(struct qcom_nand_controller *nandc,
470 int qcom_prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
472 int qcom_prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
484 int qcom_submit_descs(struct qcom_nand_controller *nandc);
485 void qcom_clear_read_regs(struct qcom_nand_controller *nandc);
486 void qcom_nandc_unalloc(struct qcom_nand_controller *nandc);
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/mtd/ |
| H A D | renesas-nandc.yaml | 4 $id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml#
20 - renesas,r9a06g032-nandc
21 - const: renesas,rzn1-nandc
58 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
|
| H A D | qcom,nandc.yaml | 4 $id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#
|
| /linux-6.15/arch/arm/boot/dts/mediatek/ |
| H A D | mt7623a.dtsi | 123 &nandc {
|
| H A D | mt7623a-rfb-nand.dts | 184 &nandc {
|
| H A D | mt2701.dtsi | 362 nandc: nand-controller@1100d000 { label
|
| H A D | mt7623.dtsi | 522 nandc: nfi@1100d000 { label
|
| /linux-6.15/arch/arm/boot/dts/renesas/ |
| H A D | r9a06g032.dtsi | 280 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
|
| /linux-6.15/arch/mips/boot/dts/ingenic/ |
| H A D | rs90.dts | 248 nandc: nand-controller@1 { label
|
| H A D | qi_lb60.dts | 256 nandc: nand-controller@1 { label
|
| H A D | ci20.dts | 411 nandc: nand-controller@1 { label
|
| /linux-6.15/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7622-rfb1.dts | 244 &nandc {
|
| H A D | mt7622-bananapi-bpi-r64.dts | 262 &nandc {
|
| H A D | mt7622.dtsi | 540 nandc: nand-controller@1100d000 { label
|
| H A D | mt2712e.dtsi | 563 nandc: nand-controller@1100e000 { label
|
| /linux-6.15/arch/arm/boot/dts/rockchip/ |
| H A D | rk3188.dtsi | 305 * The data pins are shared between nandc and emmc and
|
| H A D | rk3066a.dtsi | 416 * The data pins are shared between nandc and emmc and
|
| /linux-6.15/ |
| H A D | MAINTAINERS | 20202 F: Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
20725 F: Documentation/devicetree/bindings/mtd/renesas-nandc.yaml
|