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Searched refs:mvpp2_write (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c333 mvpp2_write(priv, MVPP2_CTRS_IDX, index); in mvpp2_cls_flow_hits()
360 mvpp2_write(priv, MVPP2_CTRS_IDX, index); in mvpp2_cls_lookup_hits()
371 mvpp2_write(priv, MVPP2_CLS_LKP_INDEX_REG, val); in mvpp2_cls_lookup_read()
384 mvpp2_write(priv, MVPP2_CLS_LKP_INDEX_REG, val); in mvpp2_cls_lookup_write()
512 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_INV, val); in mvpp2_cls_c2_write()
514 mvpp2_write(priv, MVPP22_CLS_C2_ACT, c2->act); in mvpp2_cls_c2_write()
533 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_IDX, index); in mvpp2_cls_c2_read()
947 mvpp2_write(priv, MVPP22_CLS_C2_TCAM_CTRL, in mvpp2_cls_init()
1485 mvpp2_write(priv, MVPP22_RSS_INDEX, sel); in mvpp22_rss_fill_table()
1487 mvpp2_write(priv, MVPP22_RSS_TABLE_ENTRY, in mvpp22_rss_fill_table()
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H A Dmvpp2_main.c1901 mvpp2_write(priv, MVPP2_CTRS_IDX, index); in mvpp2_read_index()
2282 mvpp2_write(port->priv, in mvpp2_defaults_set()
2699 mvpp2_write(port->priv, in mvpp2_txp_max_tx_size_set()
7195 mvpp2_write(priv, MVPP2_WIN_BASE(i), 0); in mvpp2_conf_mbus_windows()
7196 mvpp2_write(priv, MVPP2_WIN_SIZE(i), 0); in mvpp2_conf_mbus_windows()
7199 mvpp2_write(priv, MVPP2_WIN_REMAP(i), 0); in mvpp2_conf_mbus_windows()
7207 mvpp2_write(priv, MVPP2_WIN_BASE(i), in mvpp2_conf_mbus_windows()
7211 mvpp2_write(priv, MVPP2_WIN_SIZE(i), in mvpp2_conf_mbus_windows()
7232 mvpp2_write(priv, MVPP2_RX_MIN_PKT_SIZE_REG, in mvpp2_rx_fifo_init()
7289 mvpp2_write(priv, MVPP2_RX_MIN_PKT_SIZE_REG, in mvpp22_rx_fifo_init()
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H A Dmvpp2_prs.c35 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
37 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]); in mvpp2_prs_hw_write()
40 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
62 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in __mvpp2_prs_init_from_hw()
73 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in __mvpp2_prs_init_from_hw()
96 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index); in mvpp2_prs_hw_inv()
1138 mvpp2_write(priv, MVPP2_PRS_INIT_LOOKUP_REG, val); in mvpp2_prs_hw_port_init()
2179 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index); in mvpp2_prs_default_init()
2181 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), 0); in mvpp2_prs_default_init()
2183 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, index); in mvpp2_prs_default_init()
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H A Dmvpp2.h1535 void mvpp2_write(struct mvpp2 *priv, u32 offset, u32 data);