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Searched refs:mmSQ_CONFIG (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_arcturus.c328 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CONFIG)); in set_barrier_auto_waitcnt()
331 WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CONFIG), data); in set_barrier_auto_waitcnt()
H A Dgfx_v7_0.c1963 WREG32(mmSQ_CONFIG, 1); in gfx_v7_0_constants_init()
1991 WREG32(mmSQ_CONFIG, 0); in gfx_v7_0_constants_init()
H A Dgfx_v8_0.c320 mmSQ_CONFIG, 0x07f80000, 0x01180000,
351 mmSQ_CONFIG, 0x07f80000, 0x01180000,
383 mmSQ_CONFIG, 0x07f80000, 0x07180000,
H A Dgfx_v9_0.c842 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xffffffff, 0x011A0000),
2626 tmp = RREG32_SOC15(GC, 0, mmSQ_CONFIG); in gfx_v9_0_init_sq_config()
2629 WREG32_SOC15(GC, 0, mmSQ_CONFIG, tmp); in gfx_v9_0_init_sq_config()
H A Dgfx_v10_0.c3352 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),
3400 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),
3494 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0x0000001f, 0x00180070),
3531 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_CONFIG, 0xe07df47f, 0x00180070),
H A Dgfx_v6_0.c1752 WREG32(mmSQ_CONFIG, 0); in gfx_v6_0_constants_init()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1413 #define mmSQ_CONFIG 0x2300 macro
H A Dgfx_7_0_d.h1785 #define mmSQ_CONFIG 0x2300 macro
H A Dgfx_7_2_d.h1806 #define mmSQ_CONFIG 0x2300 macro
H A Dgfx_8_0_d.h1999 #define mmSQ_CONFIG 0x2300 macro
H A Dgfx_8_1_d.h1967 #define mmSQ_CONFIG 0x2300 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h393 #define mmSQ_CONFIG … macro
H A Dgc_9_1_offset.h387 #define mmSQ_CONFIG … macro
H A Dgc_9_2_1_offset.h383 #define mmSQ_CONFIG … macro
H A Dgc_10_1_0_offset.h2427 #define mmSQ_CONFIG … macro
H A Dgc_10_3_0_offset.h2516 #define mmSQ_CONFIG … macro