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Searched refs:memptrs (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/msm/
H A Dmsm_ringbuffer.c60 void *memptrs, uint64_t memptrs_iova) in msm_ringbuffer_new() argument
102 ring->memptrs = memptrs; in msm_ringbuffer_new()
116 ring->fctx = msm_fence_context_alloc(gpu->dev, &ring->memptrs->fence, name); in msm_ringbuffer_new()
H A Dmsm_gpu.c378 submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1); in recover_worker()
421 uint32_t fence = ring->memptrs->fence; in recover_worker()
428 ring->memptrs->fence = ++fence; in recover_worker()
471 submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1); in fault_worker()
527 uint32_t fence = ring->memptrs->fence; in hangcheck_handler()
666 stats = &ring->memptrs->stats[index]; in retire_submit()
861 void *memptrs; in msm_gpu_init() local
957 memptrs = msm_gem_kernel_new(drm, in msm_gpu_init()
962 if (IS_ERR(memptrs)) { in msm_gpu_init()
963 ret = PTR_ERR(memptrs); in msm_gpu_init()
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H A Dmsm_ringbuffer.h72 struct msm_rbmemptrs *memptrs; member
123 void *memptrs, uint64_t memptrs_iova);
H A Dmsm_gpu.h322 if (fence_after(ring->fctx->last_fence, ring->memptrs->fence)) in msm_gpu_active()
/linux-6.15/drivers/gpu/drm/msm/adreno/
H A Da6xx_preempt.c78 empty = ring->memptrs->fence == a6xx_gpu->last_seqno[i]; in get_next_ring()
283 u64 ttbr0 = ring->memptrs->ttbr0; in a6xx_preempt_trigger()
284 u32 context_idr = ring->memptrs->context_idr; in a6xx_preempt_trigger()
H A Dadreno_gpu.c600 ring->memptrs->rptr = 0; in adreno_hw_init()
601 ring->memptrs->bv_fence = ring->fctx->completed_fence; in adreno_hw_init()
607 if (fence_before(ring->fctx->last_fence, ring->memptrs->fence)) { in adreno_hw_init()
608 ring->memptrs->fence = ring->fctx->last_fence; in adreno_hw_init()
697 state->ring[i].fence = gpu->rb[i]->memptrs->fence; in adreno_gpu_state_get()
961 ring->memptrs->fence, in adreno_dump_info()
H A Da2xx_gpu.c486 ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); in a2xx_get_rptr()
487 return ring->memptrs->rptr; in a2xx_get_rptr()
H A Da3xx_gpu.c507 ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); in a3xx_get_rptr()
508 return ring->memptrs->rptr; in a3xx_get_rptr()
H A Da4xx_gpu.c626 ring->memptrs->rptr = gpu_read(gpu, REG_A4XX_CP_RB_RPTR); in a4xx_get_rptr()
627 return ring->memptrs->rptr; in a4xx_get_rptr()
H A Da5xx_preempt.c70 empty = ring->memptrs->fence == a5xx_gpu->last_seqno[i]; in get_next_ring()
H A Da5xx_gpu.c123 ring->memptrs->fence = submit->seqno; in a5xx_submit_in_rb()
1689 return ring->memptrs->rptr = gpu_read(gpu, REG_A5XX_CP_RB_RPTR); in a5xx_get_rptr()
H A Da6xx_gpu.c2283 return ring->memptrs->rptr = gpu_read(gpu, REG_A6XX_CP_RB_RPTR); in a6xx_get_rptr()