Searched refs:intel_ctrl (Results 1 – 4 of 4) sorted by relevance
262 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl); in zhaoxin_pmu_enable_all()607 x86_pmu.intel_ctrl = x86_pmu.cntr_mask64; in zhaoxin_pmu_init()608 x86_pmu.intel_ctrl |= x86_pmu.fixed_cntr_mask64 << INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_init()
2304 u64 intel_ctrl = hybrid(cpuc->pmu, intel_ctrl); in __intel_pmu_enable_all() local4340 u64 intel_ctrl = hybrid(cpuc->pmu, intel_ctrl); in intel_guest_get_msrs() local5005 u64 *intel_ctrl) in intel_pmu_check_counters_mask() argument5015 *intel_ctrl = *cntr_mask; in intel_pmu_check_counters_mask()5030 u64 intel_ctrl);5073 &pmu->intel_ctrl); in intel_pmu_check_hybrid_pmus()5087 pmu->intel_ctrl); in intel_pmu_check_hybrid_pmus()6396 u64 intel_ctrl) in intel_pmu_check_event_constraints() argument6425 c->idxmsk64 &= intel_ctrl; in intel_pmu_check_event_constraints()7438 &x86_pmu.intel_ctrl); in intel_pmu_init()[all …]
706 u64 intel_ctrl; member873 u64 intel_ctrl; member1380 u64 intel_ctrl = hybrid(pmu, intel_ctrl); in fixed_counter_disabled() local1382 return !(intel_ctrl >> (i + INTEL_PMC_IDX_FIXED)); in fixed_counter_disabled()
2064 pr_info("... event mask: %016Lx\n", hybrid(pmu, intel_ctrl)); in x86_pmu_show_pmu_cap()2111 if (!x86_pmu.intel_ctrl) in init_hw_perf_events()2112 x86_pmu.intel_ctrl = x86_pmu.cntr_mask64; in init_hw_perf_events()