| /linux-6.15/include/linux/pinctrl/ |
| H A D | machine.h | 108 #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs) \ argument
116 .configs = cfgs, \
117 .num_configs = ARRAY_SIZE(cfgs), \
124 #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs) \ argument
125 PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs)
127 #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfgs) \ argument
138 .configs = cfgs, \
139 .num_configs = ARRAY_SIZE(cfgs), \
146 #define PIN_MAP_CONFIGS_GROUP_HOG(dev, state, grp, cfgs) \ argument
147 PIN_MAP_CONFIGS_GROUP(dev, state, dev, grp, cfgs)
[all …]
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| /linux-6.15/scripts/ |
| H A D | generate_rust_analyzer.py | 14 def args_crates_cfgs(cfgs): argument
16 for cfg in cfgs:
22 def generate_crates(srctree, objtree, sysroot_src, external_src, cfgs): argument
36 crates_cfgs = args_crates_cfgs(cfgs)
196 … "crates": generate_crates(args.srctree, args.objtree, args.sysroot_src, args.exttree, args.cfgs),
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| /linux-6.15/drivers/hwtracing/coresight/ |
| H A D | coresight-ctcu-core.c | 188 const struct ctcu_config *cfgs; in ctcu_probe() local
214 cfgs = of_device_get_match_data(dev); in ctcu_probe()
215 if (cfgs) { in ctcu_probe()
216 if (cfgs->num_etr_config <= ETR_MAX_NUM) { in ctcu_probe()
217 for (i = 0; i < cfgs->num_etr_config; i++) { in ctcu_probe()
218 etr_cfg = &cfgs->etr_cfgs[i]; in ctcu_probe()
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| /linux-6.15/drivers/phy/samsung/ |
| H A D | phy-samsung-ufs.c | 79 const struct samsung_ufs_phy_cfg * const *cfgs = ufs_phy->cfgs; in samsung_ufs_phy_calibrate() local
90 cfg = cfgs[ufs_phy->ufs_phy_state]; in samsung_ufs_phy_calibrate()
289 phy->cfgs = drvdata->cfgs; in samsung_ufs_phy_probe()
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| H A D | phy-samsung-ufs.h | 110 const struct samsung_ufs_phy_cfg **cfgs; member
126 const struct samsung_ufs_phy_cfg * const *cfgs; member
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| H A D | phy-fsd-ufs.c | 54 .cfgs = fsd_ufs_phy_cfgs,
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| H A D | phy-exynosautov9-ufs.c | 65 .cfgs = exynosautov9_ufs_phy_cfgs,
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| H A D | phy-exynos7-ufs.c | 76 .cfgs = exynos7_ufs_phy_cfgs,
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| H A D | phy-exynosautov920-ufs.c | 158 .cfgs = exynosautov920_ufs_phy_cfgs,
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| H A D | phy-gs101-ufs.c | 172 .cfgs = tensor_gs101_ufs_phy_cfgs,
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| /linux-6.15/arch/mips/mm/ |
| H A D | init.c | 318 struct maar_config cfgs[3]; in maar_init() member
335 used = maar_config(recorded.cfgs, recorded.used, num_maars / 2); in maar_init()
387 if (used <= ARRAY_SIZE(recorded.cfgs)) { in maar_init()
388 recorded.cfgs[recorded.used].lower = lower; in maar_init()
389 recorded.cfgs[recorded.used].upper = upper; in maar_init()
390 recorded.cfgs[recorded.used].attrs = attr; in maar_init()
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| /linux-6.15/drivers/phy/rockchip/ |
| H A D | phy-rockchip-usbdp.c | 198 const struct rk_udphy_cfg *cfgs; member
472 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_reset_init()
490 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_u3_port_disable()
499 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_usb_bvalid_enable()
543 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dplane_select()
610 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dp_hpd_event_trigger()
784 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_init()
1173 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dp_set_voltage()
1467 udphy->cfgs = device_get_match_data(dev); in rk_udphy_probe()
1468 if (!udphy->cfgs) in rk_udphy_probe()
[all …]
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| H A D | phy-rockchip-samsung-hdptx.c | 426 const struct rk_hdptx_phy_cfg *cfgs; member
1946 hdptx->cfgs = device_get_match_data(dev); in rk_hdptx_phy_probe()
1947 if (!hdptx->cfgs) in rk_hdptx_phy_probe()
1952 for (id = 0; id < hdptx->cfgs->num_phys; id++) { in rk_hdptx_phy_probe()
1953 if (res->start == hdptx->cfgs->phy_ids[id]) { in rk_hdptx_phy_probe()
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| /linux-6.15/rust/ |
| H A D | Makefile | 60 core-cfgs = \
110 rustdoc-core: private rustc_target_flags = $(core-cfgs)
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| /linux-6.15/drivers/pinctrl/renesas/ |
| H A D | pinctrl.c | 84 unsigned long *cfgs; in sh_pfc_map_add_config() local
86 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in sh_pfc_map_add_config()
87 if (cfgs == NULL) in sh_pfc_map_add_config()
92 map->data.configs.configs = cfgs; in sh_pfc_map_add_config()
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| H A D | pinctrl-rzv2m.c | 197 unsigned long *cfgs; in rzv2m_map_add_config() local
199 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in rzv2m_map_add_config()
200 if (!cfgs) in rzv2m_map_add_config()
205 map->data.configs.configs = cfgs; in rzv2m_map_add_config()
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| H A D | sh_pfc.h | 679 #define SH_PFC_PIN_CFG(_pin, cfgs) { \ argument
683 .configs = cfgs, \
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| H A D | pinctrl-rzg2l.c | 570 unsigned long *cfgs; in rzg2l_map_add_config() local
572 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in rzg2l_map_add_config()
573 if (!cfgs) in rzg2l_map_add_config()
578 map->data.configs.configs = cfgs; in rzg2l_map_add_config()
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| /linux-6.15/Documentation/devicetree/bindings/thermal/ |
| H A D | nvidia,tegra124-soctherm.yaml | 62 throttle-cfgs:
261 throttle-cfgs {
306 # referring to Tegra132's "reg", "reg-names" and "throttle-cfgs"
323 throttle-cfgs {
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| /linux-6.15/drivers/pinctrl/nxp/ |
| H A D | pinctrl-s32cc.c | 227 unsigned long *cfgs = NULL; in s32_dt_group_node_to_map() local
238 ret = pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs); in s32_dt_group_node_to_map()
259 num_maps, np->name, cfgs, n_cfgs, in s32_dt_group_node_to_map()
266 kfree(cfgs); in s32_dt_group_node_to_map()
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| /linux-6.15/drivers/accel/amdxdna/ |
| H A D | aie2_message.c | 414 req.cfgs[i] = FIELD_PREP(AIE2_MSG_CFG_CU_PDI_ADDR, in aie2_config_cu()
416 req.cfgs[i] |= FIELD_PREP(AIE2_MSG_CFG_CU_FUNC, cu->cu_func); in aie2_config_cu()
418 abo->mem.dev_addr, req.cfgs[i]); in aie2_config_cu()
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| H A D | aie2_msg_priv.h | 279 __u32 cfgs[MAX_NUM_CUS]; member
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| /linux-6.15/drivers/mtd/devices/ |
| H A D | st_spi_fsm.c | 1018 struct seq_rw_config cfgs[]) in stfsm_search_seq_rw_configs() argument
1023 for (config = cfgs; config->cmd != 0; config++) in stfsm_search_seq_rw_configs()
1101 struct seq_rw_config *cfgs) in stfsm_search_prepare_rw_seq() argument
1105 config = stfsm_search_seq_rw_configs(fsm, cfgs); in stfsm_search_prepare_rw_seq()
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| /linux-6.15/drivers/net/ethernet/emulex/benet/ |
| H A D | be_cmds.c | 4083 struct be_fat_conf_params *cfgs; in be_cmd_set_fw_log_level() local
4099 cfgs = (struct be_fat_conf_params *) in be_cmd_set_fw_log_level()
4101 for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { in be_cmd_set_fw_log_level()
4102 u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); in be_cmd_set_fw_log_level()
4105 if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) in be_cmd_set_fw_log_level()
4106 cfgs->module[i].trace_lvl[j].dbg_lvl = in be_cmd_set_fw_log_level()
4121 struct be_fat_conf_params *cfgs; in be_cmd_get_fw_log_level() local
4139 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + in be_cmd_get_fw_log_level()
4142 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { in be_cmd_get_fw_log_level()
4143 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) in be_cmd_get_fw_log_level()
[all …]
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| /linux-6.15/drivers/soc/qcom/ |
| H A D | llcc-qcom.c | 3941 const struct qcom_sct_config *cfgs; in qcom_llcc_probe() local
3965 cfgs = of_device_get_match_data(&pdev->dev); in qcom_llcc_probe()
3966 if (!cfgs) { in qcom_llcc_probe()
3970 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); in qcom_llcc_probe()
3973 cfg = &cfgs->llcc_config[cfg_index]; in qcom_llcc_probe()
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