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Searched refs:cci_write (Results 1 – 25 of 27) sorted by relevance

12

/linux-6.15/drivers/media/i2c/
H A Dimx283.c740 ret = cci_write(imx283->cci, IMX283_REG_TPG_PAT, in imx283_update_test_pattern()
745 return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, in imx283_update_test_pattern()
833 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
836 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
993 cci_write(imx283->cci, IMX283_REG_STANDBY, in imx283_standby_cancel()
1026 cci_write(imx283->cci, IMX283_REG_XMSTA, 0, &ret); in imx283_standby_cancel()
1065 cci_write(imx283->cci, IMX283_REG_MDSEL3, in imx283_start_streaming()
1067 cci_write(imx283->cci, IMX283_REG_MDSEL4, in imx283_start_streaming()
1072 cci_write(imx283->cci, IMX283_REG_MDSEL7, 0x01, &ret); in imx283_start_streaming()
1082 cci_write(imx283->cci, IMX283_REG_SVR, 0x00, &ret); in imx283_start_streaming()
[all …]
H A Dov4689.c421 cci_write(rm, OV4689_REG_H_CROP_START, 8, &ret); in ov4689_setup_timings()
422 cci_write(rm, OV4689_REG_V_CROP_START, 8, &ret); in ov4689_setup_timings()
423 cci_write(rm, OV4689_REG_H_CROP_END, 2711, &ret); in ov4689_setup_timings()
424 cci_write(rm, OV4689_REG_V_CROP_END, 1531, &ret); in ov4689_setup_timings()
429 cci_write(rm, OV4689_REG_H_WIN_OFF, 8, &ret); in ov4689_setup_timings()
430 cci_write(rm, OV4689_REG_V_WIN_OFF, 4, &ret); in ov4689_setup_timings()
432 cci_write(rm, OV4689_REG_VFIFO_CTRL_01, 167, &ret); in ov4689_setup_timings()
442 cci_write(rm, OV4689_REG_ANCHOR_LEFT_START, 16, &ret); in ov4689_setup_blc_anchors()
498 cci_write(ov4689->regmap, OV4689_REG_CTRL_MODE, in ov4689_s_stream()
668 cci_write(regmap, OV4689_REG_VTS, in ov4689_set_ctrl()
[all …]
H A Dimx219.c481 cci_write(imx219->regmap, IMX219_REG_ANALOG_GAIN, in imx219_set_ctrl()
485 cci_write(imx219->regmap, IMX219_REG_EXPOSURE, in imx219_set_ctrl()
489 cci_write(imx219->regmap, IMX219_REG_DIGITAL_GAIN, in imx219_set_ctrl()
493 cci_write(imx219->regmap, IMX219_REG_TEST_PATTERN, in imx219_set_ctrl()
498 cci_write(imx219->regmap, IMX219_REG_ORIENTATION, in imx219_set_ctrl()
510 cci_write(imx219->regmap, IMX219_REG_TESTP_RED, in imx219_set_ctrl()
518 cci_write(imx219->regmap, IMX219_REG_TESTP_BLUE, in imx219_set_ctrl()
682 cci_write(imx219->regmap, IMX219_REG_X_ADD_STA_A, in imx219_set_framefmt()
684 cci_write(imx219->regmap, IMX219_REG_X_ADD_END_A, in imx219_set_framefmt()
686 cci_write(imx219->regmap, IMX219_REG_Y_ADD_STA_A, in imx219_set_framefmt()
[all …]
H A Dvgxy61.c973 return cci_write(sensor->regmap, VGXY61_REG_FRAME_LENGTH, in vgxy61_apply_framelength()
1049 ret = cci_write(sensor->regmap, VGXY61_REG_ANALOG_GAIN, in vgxy61_apply_settings()
1057 ret = cci_write(sensor->regmap, VGXY61_REG_ORIENTATION, in vgxy61_apply_settings()
1090 cci_write(sensor->regmap, VGXY61_REG_FORMAT_CTRL, in vgxy61_stream_enable()
1092 cci_write(sensor->regmap, VGXY61_REG_OIF_ROI0_CTRL, in vgxy61_stream_enable()
1095 cci_write(sensor->regmap, VGXY61_REG_READOUT_CTRL, in vgxy61_stream_enable()
1098 cci_write(sensor->regmap, VGXY61_REG_ROI0_END_H, in vgxy61_stream_enable()
1101 cci_write(sensor->regmap, VGXY61_REG_ROI0_END_V, in vgxy61_stream_enable()
1110 ret = cci_write(sensor->regmap, VGXY61_REG_STREAMING, in vgxy61_stream_enable()
1141 ret = cci_write(sensor->regmap, VGXY61_REG_STREAMING, in vgxy61_stream_disable()
[all …]
H A Dmt9m114.c718 cci_write(sensor->regmap, MT9M114_COMMAND_REGISTER, in mt9m114_set_state()
863 cci_write(sensor->regmap, MT9M114_CAM_OUTPUT_WIDTH, in mt9m114_configure()
865 cci_write(sensor->regmap, MT9M114_CAM_OUTPUT_HEIGHT, in mt9m114_configure()
887 cci_write(sensor->regmap, MT9M114_CAM_CROP_CROPMODE, in mt9m114_configure()
899 cci_write(sensor->regmap, MT9M114_CAM_OUTPUT_FORMAT, in mt9m114_configure()
1062 cci_write(sensor->regmap, in mt9m114_pa_s_ctrl()
1511 cci_write(sensor->regmap, MT9M114_CAM_MODE_SELECT, in mt9m114_ifp_s_ctrl()
1513 cci_write(sensor->regmap, in mt9m114_ifp_s_ctrl()
1516 cci_write(sensor->regmap, in mt9m114_ifp_s_ctrl()
1519 cci_write(sensor->regmap, in mt9m114_ifp_s_ctrl()
[all …]
H A Dimx290.c698 cci_write(imx290->regmap, IMX290_FR_FDG_SEL, 0x01, &ret); in imx290_set_data_lanes()
709 return cci_write(imx290->regmap, IMX290_BLKLEVEL, in imx290_set_black_level()
815 ret = cci_write(imx290->regmap, IMX290_VMAX, in imx290_set_ctrl()
828 ret = cci_write(imx290->regmap, IMX290_SHS1, in imx290_set_ctrl()
836 cci_write(imx290->regmap, IMX290_PGCTRL, in imx290_set_ctrl()
841 cci_write(imx290->regmap, IMX290_PGCTRL, 0x00, &ret); in imx290_set_ctrl()
849 ret = cci_write(imx290->regmap, IMX290_HMAX, in imx290_set_ctrl()
1061 cci_write(imx290->regmap, IMX290_STANDBY, 0x00, &ret); in imx290_start_streaming()
1066 return cci_write(imx290->regmap, IMX290_XMSTA, 0x00, &ret); in imx290_start_streaming()
1074 cci_write(imx290->regmap, IMX290_STANDBY, 0x01, &ret); in imx290_stop_streaming()
[all …]
H A Dst-mipid02.c462 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, 0, &ret); in mipid02_disable_streams()
463 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, 0, &ret); in mipid02_disable_streams()
464 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, 0, &ret); in mipid02_disable_streams()
510 cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, in mipid02_enable_streams()
513 cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, in mipid02_enable_streams()
516 cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, in mipid02_enable_streams()
519 cci_write(bridge->regmap, MIPID02_MODE_REG1, in mipid02_enable_streams()
524 cci_write(bridge->regmap, MIPID02_DATA_SELECTION_CTRL, in mipid02_enable_streams()
526 cci_write(bridge->regmap, MIPID02_PIX_WIDTH_CTRL, in mipid02_enable_streams()
528 cci_write(bridge->regmap, MIPID02_PIX_WIDTH_CTRL_EMB, in mipid02_enable_streams()
[all …]
H A Dov2680.c385 cci_write(sensor->regmap, OV2680_REG_SENSOR_CTRL_0A, in ov2680_set_mode()
387 cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_START, in ov2680_set_mode()
389 cci_write(sensor->regmap, OV2680_REG_VERTICAL_START, in ov2680_set_mode()
391 cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_END, in ov2680_set_mode()
393 cci_write(sensor->regmap, OV2680_REG_VERTICAL_END, in ov2680_set_mode()
399 cci_write(sensor->regmap, OV2680_REG_TIMING_HTS, in ov2680_set_mode()
404 cci_write(sensor->regmap, OV2680_REG_X_INC, inc, &ret); in ov2680_set_mode()
405 cci_write(sensor->regmap, OV2680_REG_Y_INC, inc, &ret); in ov2680_set_mode()
406 cci_write(sensor->regmap, OV2680_REG_X_WIN, in ov2680_set_mode()
408 cci_write(sensor->regmap, OV2680_REG_Y_WIN, in ov2680_set_mode()
[all …]
H A Dmax96714.c173 cci_write(priv->regmap, MAX96714_PATGEN_VS_DLY, 0, &ret); in max96714_apply_patgen_timing()
175 cci_write(priv->regmap, MAX96714_PATGEN_VS_LOW, in max96714_apply_patgen_timing()
177 cci_write(priv->regmap, MAX96714_PATGEN_HS_HIGH, h_sw, &ret); in max96714_apply_patgen_timing()
180 cci_write(priv->regmap, MAX96714_PATGEN_V2D, in max96714_apply_patgen_timing()
182 cci_write(priv->regmap, MAX96714_PATGEN_HS_CNT, v_tot, &ret); in max96714_apply_patgen_timing()
183 cci_write(priv->regmap, MAX96714_PATGEN_DE_HIGH, h_active, &ret); in max96714_apply_patgen_timing()
184 cci_write(priv->regmap, MAX96714_PATGEN_DE_LOW, h_fp + h_sw + h_bp, in max96714_apply_patgen_timing()
186 cci_write(priv->regmap, MAX96714_PATGEN_DE_CNT, v_active, &ret); in max96714_apply_patgen_timing()
191 cci_write(priv->regmap, MAX96714_PATGEN_CHKB_RPT_CNT_A, 0x3c, &ret); in max96714_apply_patgen_timing()
193 cci_write(priv->regmap, MAX96714_PATGEN_CHKB_ALT, 0x3c, &ret); in max96714_apply_patgen_timing()
[all …]
H A Dimx415.c675 cci_write(sensor->regmap, IMX415_TPG_PATSEL_DUOUT, in imx415_set_testpattern()
682 cci_write(sensor->regmap, IMX415_BLKLEVEL, in imx415_set_testpattern()
720 ret = cci_write(sensor->regmap, IMX415_VMAX, in imx415_s_ctrl()
734 ret = cci_write(sensor->regmap, IMX415_SHR0, in imx415_s_ctrl()
740 ret = cci_write(sensor->regmap, IMX415_GAIN_PCG_0, in imx415_s_ctrl()
756 ret = cci_write(sensor->regmap, IMX415_HMAX, in imx415_s_ctrl()
884 ret = cci_write(sensor->regmap, IMX415_LANEMODE, in imx415_set_mode()
910 ret = cci_write(sensor->regmap, IMX415_MODE, in imx415_wakeup()
930 return cci_write(sensor->regmap, IMX415_XMSTA, in imx415_stream_on()
938 ret = cci_write(sensor->regmap, IMX415_XMSTA, in imx415_stream_off()
[all …]
H A Dmax96717.c197 cci_write(priv->regmap, MAX96717_VTX_VS_DLY, 0, &ret); in max96717_apply_patgen_timing()
199 cci_write(priv->regmap, MAX96717_VTX_VS_LOW, in max96717_apply_patgen_timing()
201 cci_write(priv->regmap, MAX96717_VTX_HS_HIGH, h_sw, &ret); in max96717_apply_patgen_timing()
204 cci_write(priv->regmap, MAX96717_VTX_V2D, in max96717_apply_patgen_timing()
206 cci_write(priv->regmap, MAX96717_VTX_HS_CNT, v_tot, &ret); in max96717_apply_patgen_timing()
207 cci_write(priv->regmap, MAX96717_VTX_DE_HIGH, h_active, &ret); in max96717_apply_patgen_timing()
208 cci_write(priv->regmap, MAX96717_VTX_DE_LOW, h_fp + h_sw + h_bp, in max96717_apply_patgen_timing()
210 cci_write(priv->regmap, MAX96717_VTX_DE_CNT, v_active, &ret); in max96717_apply_patgen_timing()
217 cci_write(priv->regmap, MAX96717_VTX_CHKB_ALT, 0x3c, &ret); in max96717_apply_patgen_timing()
218 cci_write(priv->regmap, MAX96717_VTX_GRAD_INC, 0x10, &ret); in max96717_apply_patgen_timing()
[all …]
H A Ddw9719.c91 cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_SHUTDOWN, &ret); in dw9719_power_up()
93 cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_STANDBY, &ret); in dw9719_power_up()
130 cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret); in dw9719_power_up()
131 cci_write(dw9719->regmap, DW9719_MODE, dw9719->mode_low_bits | in dw9719_power_up()
133 cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret); in dw9719_power_up()
136 cci_write(dw9719->regmap, DW9761_VCM_PRELOAD, in dw9719_power_up()
147 return cci_write(dw9719->regmap, DW9719_VCM_CURRENT, value, NULL); in dw9719_t_focus_abs()
H A Dthp7312.c401 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_RD, in thp7312_set_mipi_lanes()
403 cci_write(thp7312->regmap, TH7312_REG_CUSTOM_MIPI_TD, in thp7312_set_mipi_lanes()
435 cci_write(thp7312->regmap, THP7312_REG_VIDEO_IMAGE_SIZE, in thp7312_change_mode()
475 return cci_write(thp7312->regmap, in thp7312_set_framefmt()
938 ret = cci_write(thp7312->regmap, in thp7312_set_focus()
1029 cci_write(thp7312->regmap, THP7312_REG_AF_CONTROL, in thp7312_set_focus()
1057 cci_write(thp7312->regmap, THP7312_REG_BRIGHTNESS, in thp7312_s_ctrl()
1127 cci_write(thp7312->regmap, THP7312_REG_AE_FLICKER_MODE, in thp7312_s_ctrl()
1132 cci_write(thp7312->regmap, THP7312_REG_SATURATION, in thp7312_s_ctrl()
1137 cci_write(thp7312->regmap, THP7312_REG_CONTRAST, in thp7312_s_ctrl()
[all …]
H A Dov5693.c436 cci_write(ov5693->regmap, OV5693_MWB_RED_GAIN_REG, gain, &ret); in ov5693_digital_gain_configure()
449 cci_write(ov5693->regmap, OV5693_GAIN_CTRL_REG, gain, &ret); in ov5693_analog_gain_configure()
459 cci_write(ov5693->regmap, OV5693_TIMING_VTS_REG, vts, &ret); in ov5693_vts_configure()
468 cci_write(ov5693->regmap, OV5693_TEST_PATTERN_REG, in ov5693_test_pattern_configure()
562 cci_write(ov5693->regmap, OV5693_OFFSET_START_X_REG, 0, &ret); in ov5693_mode_configure()
569 cci_write(ov5693->regmap, OV5693_CROP_END_X_REG, in ov5693_mode_configure()
581 cci_write(ov5693->regmap, OV5693_OFFSET_START_Y_REG, 0, &ret); in ov5693_mode_configure()
588 cci_write(ov5693->regmap, OV5693_CROP_END_Y_REG, in ov5693_mode_configure()
592 cci_write(ov5693->regmap, OV5693_SUB_INC_X_REG, in ov5693_mode_configure()
595 cci_write(ov5693->regmap, OV5693_SUB_INC_Y_REG, in ov5693_mode_configure()
[all …]
H A Dimx214.c825 cci_write(imx214->regmap, IMX214_REG_ANALOG_GAIN, in imx214_set_ctrl()
827 cci_write(imx214->regmap, IMX214_REG_SHORT_ANALOG_GAIN, in imx214_set_ctrl()
838 cci_write(imx214->regmap, IMX214_REG_ORIENTATION, in imx214_set_ctrl()
842 cci_write(imx214->regmap, IMX214_REG_FRM_LENGTH_LINES, in imx214_set_ctrl()
846 cci_write(imx214->regmap, IMX214_REG_TEST_PATTERN, in imx214_set_ctrl()
850 cci_write(imx214->regmap, IMX214_REG_TESTP_RED, in imx214_set_ctrl()
854 cci_write(imx214->regmap, IMX214_REG_TESTP_GREENR, in imx214_set_ctrl()
858 cci_write(imx214->regmap, IMX214_REG_TESTP_BLUE, in imx214_set_ctrl()
862 cci_write(imx214->regmap, IMX214_REG_TESTP_GREENB, in imx214_set_ctrl()
1050 ret = cci_write(imx214->regmap, IMX214_REG_MODE_SELECT, in imx214_start_streaming()
[all …]
H A Dimx258.c773 ret = cci_write(imx258->regmap, IMX258_REG_ANALOG_GAIN, in imx258_set_ctrl()
777 ret = cci_write(imx258->regmap, IMX258_REG_EXPOSURE, in imx258_set_ctrl()
784 ret = cci_write(imx258->regmap, IMX258_REG_TEST_PATTERN, in imx258_set_ctrl()
789 ret = cci_write(imx258->regmap, IMX258_REG_HDR, in imx258_set_ctrl()
792 ret = cci_write(imx258->regmap, IMX258_REG_HDR, in imx258_set_ctrl()
796 ret = cci_write(imx258->regmap, IMX258_REG_HDR_RATIO, in imx258_set_ctrl()
801 ret = cci_write(imx258->regmap, IMX258_REG_FRM_LENGTH_LINES, in imx258_set_ctrl()
806 ret = cci_write(imx258->regmap, REG_MIRROR_FLIP_CONTROL, in imx258_set_ctrl()
1056 ret = cci_write(imx258->regmap, IMX258_CLK_BLANK_STOP, in imx258_start_streaming()
1078 return cci_write(imx258->regmap, IMX258_REG_MODE_SELECT, in imx258_start_streaming()
[all …]
H A Dgc2145.c861 cci_write(gc2145->regmap, GC2145_REG_LWC, lwc, &ret); in gc2145_config_mipi_mode()
878 cci_write(gc2145->regmap, GC2145_REG_FIFO_FULL_LVL, in gc2145_config_mipi_mode()
885 cci_write(gc2145->regmap, GC2145_REG_FIFO_GATE_MODE, in gc2145_config_mipi_mode()
890 cci_write(gc2145->regmap, GC2145_REG_MIPI_DT, in gc2145_config_mipi_mode()
894 cci_write(gc2145->regmap, GC2145_REG_BUF_CSI2_MODE, in gc2145_config_mipi_mode()
931 cci_write(gc2145->regmap, GC2145_REG_OUTPUT_FMT, in gc2145_enable_streams()
1143 cci_write(gc2145->regmap, GC2145_REG_DEBUG_MODE2, 0, &ret); in gc2145_set_ctrl_test_pattern()
1144 return cci_write(gc2145->regmap, GC2145_REG_DEBUG_MODE3, 0, in gc2145_set_ctrl_test_pattern()
1149 cci_write(gc2145->regmap, GC2145_REG_DEBUG_MODE2, in gc2145_set_ctrl_test_pattern()
1153 return cci_write(gc2145->regmap, GC2145_REG_DEBUG_MODE3, 0, in gc2145_set_ctrl_test_pattern()
[all …]
H A Dimx335.c480 cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); in imx335_update_exp_gain()
481 cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); in imx335_update_exp_gain()
482 cci_write(imx335->cci, IMX335_REG_SHUTTER, shutter, &ret); in imx335_update_exp_gain()
483 cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); in imx335_update_exp_gain()
488 ret_hold = cci_write(imx335->cci, IMX335_REG_HOLD, 0, NULL); in imx335_update_exp_gain()
512 cci_write(imx335->cci, IMX335_REG_TPG, in imx335_update_test_pattern()
886 ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, in imx335_start_streaming()
899 ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, in imx335_start_streaming()
920 return cci_write(imx335->cci, IMX335_REG_MODE_SELECT, in imx335_stop_streaming()
H A Dgc05a2.c867 ret = cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_IDX, in gc05a2_test_pattern()
872 return cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_EN, in gc05a2_test_pattern()
875 return cci_write(gc05a2->regmap, GC05A2_REG_TEST_PATTERN_EN, in gc05a2_test_pattern()
910 ret = cci_write(gc05a2->regmap, GC05A2_EXP_REG, in gc05a2_set_ctrl()
915 ret = cci_write(gc05a2->regmap, GC05A2_AGAIN_REG, in gc05a2_set_ctrl()
920 ret = cci_write(gc05a2->regmap, GC05A2_FRAME_LENGTH_REG, in gc05a2_set_ctrl()
1006 ret = cci_write(gc05a2->regmap, GC05A2_STREAMING_REG, 1, NULL); in gc05a2_start_streaming()
1023 ret = cci_write(gc05a2->regmap, GC05A2_STREAMING_REG, 0, NULL); in gc05a2_stop_streaming()
H A Dgc08a3.c837 ret = cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_IDX, in gc08a3_test_pattern()
842 return cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_EN, in gc08a3_test_pattern()
845 return cci_write(gc08a3->regmap, GC08A3_REG_TEST_PATTERN_EN, in gc08a3_test_pattern()
880 ret = cci_write(gc08a3->regmap, GC08A3_EXP_REG, in gc08a3_set_ctrl()
885 ret = cci_write(gc08a3->regmap, GC08A3_AGAIN_REG, in gc08a3_set_ctrl()
890 ret = cci_write(gc08a3->regmap, GC08A3_FRAME_LENGTH_REG, in gc08a3_set_ctrl()
948 ret = cci_write(gc08a3->regmap, GC08A3_STREAMING_REG, 1, NULL); in gc08a3_start_streaming()
965 ret = cci_write(gc08a3->regmap, GC08A3_STREAMING_REG, 0, NULL); in gc08a3_stop_streaming()
H A Dlt6911uxe.c292 cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, &ret); in lt6911uxe_status_update()
357 cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x1, &ret); in lt6911uxe_enable_streams()
378 ret = cci_write(lt6911uxe->regmap, REG_MIPI_TX_CTRL, 0x0, NULL); in lt6911uxe_disable_streams()
536 cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x1, &ret); in lt6911uxe_identify_module()
538 cci_write(lt6911uxe->regmap, REG_ENABLE_I2C, 0x0, &ret); in lt6911uxe_identify_module()
H A Dov64a40.c2883 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL0, in ov64a40_program_geometry()
2885 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL2, in ov64a40_program_geometry()
2887 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL4, in ov64a40_program_geometry()
2889 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL6, in ov64a40_program_geometry()
2893 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL10, in ov64a40_program_geometry()
2895 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL12, in ov64a40_program_geometry()
2897 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL8, in ov64a40_program_geometry()
2899 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRLA, in ov64a40_program_geometry()
2916 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL14, in ov64a40_program_subsampling()
2919 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL15, in ov64a40_program_subsampling()
[all …]
H A Dgc0308.c822 return cci_write(gc0308->regmap, CCI_REG8(reg->reg), reg->val, NULL); in gc0308_s_register()
927 cci_write(gc0308->regmap, GC0308_VB_HB, vbhb, &ret); in gc0308_update_blanking()
928 cci_write(gc0308->regmap, GC0308_HBLANK, hblank & 0xff, &ret); in gc0308_update_blanking()
929 cci_write(gc0308->regmap, GC0308_VBLANK, vblank & 0xff, &ret); in gc0308_update_blanking()
1153 ret = cci_write(gc0308->regmap, GC0308_SYNC_MODE, sync_mode, NULL); in gc0308_start_stream()
/linux-6.15/drivers/media/v4l2-core/
H A Dv4l2-cci.c92 int cci_write(struct regmap *map, u32 reg, u64 val, int *err) in cci_write() function
152 EXPORT_SYMBOL_GPL(cci_write);
165 return cci_write(map, reg, val, err); in cci_update_bits()
176 ret = cci_write(map, regs[i].reg, regs[i].val, err); in cci_multi_reg_write()
/linux-6.15/include/media/
H A Dv4l2-cci.h82 int cci_write(struct regmap *map, u32 reg, u64 val, int *err);

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