Searched refs:alt_parent (Results 1 – 2 of 2) sorted by relevance
101 const struct clk_hw *alt_parent; member446 clk_div = clk_hw_get_parent(alt_parent); in exynos850_alt_parent_set_max_rate()467 ret = clk_set_rate(alt_parent->clk, div_rate); in exynos850_alt_parent_set_max_rate()482 const struct clk_hw *alt_parent = cpuclk->alt_parent; in exynos850_cpuclk_pre_rate_change() local484 unsigned long alt_prate = clk_hw_get_rate(alt_parent); in exynos850_cpuclk_pre_rate_change()545 const struct clk_hw *alt_parent = cpuclk->alt_parent; in exynos850_cpuclk_post_rate_change() local564 return exynos850_alt_parent_set_max_rate(alt_parent, 0); in exynos850_cpuclk_post_rate_change()645 const struct clk_hw *parent, *alt_parent; in exynos_register_cpu_clock() local655 alt_parent = hws[clk_data->alt_parent_id]; in exynos_register_cpu_clock()656 if (IS_ERR(parent) || IS_ERR(alt_parent)) { in exynos_register_cpu_clock()[all …]
54 struct clk *alt_parent; member169 alt_prate = clk_get_rate(cpuclk->alt_parent); in rockchip_cpuclk_pre_rate_change()339 cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); in rockchip_clk_register_cpuclk()340 if (!cpuclk->alt_parent) { in rockchip_clk_register_cpuclk()347 ret = clk_prepare_enable(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()394 clk_disable_unprepare(cpuclk->alt_parent); in rockchip_clk_register_cpuclk()