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/linux-6.15/include/linux/
H A Dcleanup.h200 #define __free(_name) __cleanup(__free_##_name) argument
251 typedef class_##_name##_t class_##_name##ext##_t; \
252 static inline void class_##_name##ext##_destructor(class_##_name##_t *p)\
258 class_##_name##_t var __cleanup(class_##_name##_destructor) = \
295 static inline void * class_##_name##_lock_ptr(class_##_name##_t *_T) \
321 #define __guard_ptr(_name) class_##_name##_lock_ptr argument
322 #define __is_cond_ptr(_name) class_##_name##_is_conditional argument
335 __guard_ptr(_name)(&scope) || !__is_cond_ptr(_name); \
383 static inline void class_##_name##_destructor(class_##_name##_t *_T) \
391 static inline class_##_name##_t class_##_name##_constructor(_type *l) \
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H A Dhwmon-sysfs.h21 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
24 #define SENSOR_ATTR_RO(_name, _func, _index) \ argument
25 SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index)
27 #define SENSOR_ATTR_RW(_name, _func, _index) \ argument
30 #define SENSOR_ATTR_WO(_name, _func, _index) \ argument
31 SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index)
35 = SENSOR_ATTR(_name, _mode, _show, _store, _index)
37 #define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ argument
40 #define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ argument
43 #define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ argument
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H A Dsysfs.h267 #define __ATTR_RW(_name) __ATTR(_name, 0644, _name##_show, _name##_store) argument
361 __BIN_ATTR(_name, 0444, _name##_read, NULL, _size)
364 __BIN_ATTR(_name, 0200, NULL, _name##_write, _size)
367 __BIN_ATTR(_name, 0644, _name##_read, _name##_write, _size)
372 struct bin_attribute bin_attr_##_name = __BIN_ATTR(_name, _mode, _read, \
376 struct bin_attribute bin_attr_##_name = __BIN_ATTR_RO(_name, _size)
379 struct bin_attribute bin_attr_##_name = __BIN_ATTR_WO(_name, _size)
382 struct bin_attribute bin_attr_##_name = __BIN_ATTR_RW(_name, _size)
386 __BIN_ATTR(_name, 0400, _name##_read, NULL, _size)
389 __BIN_ATTR(_name, 0600, _name##_read, _name##_write, _size)
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H A Dconfigfs.h125 .ca_name = __stringify(_name), \
128 .show = _pfx##_name##_show, \
129 .store = _pfx##_name##_store, \
134 .ca_name = __stringify(_name), \
137 .show = _pfx##_name##_show, \
142 .ca_name = __stringify(_name), \
145 .store = _pfx##_name##_store, \
162 .ca_name = __stringify(_name), \
168 .read = _pfx##_name##_read, \
169 .write = _pfx##_name##_write, \
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H A Dcounter.h419 .name = (_name), \
426 .name = (_name), \
433 .name = (_name), \
441 .name = (_name), \
448 .name = (_name), \
455 .name = (_name), \
463 .name = (_name), \
470 .name = (_name), \
477 .name = (_name), \
505 .name = (_name), \
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/linux-6.15/include/linux/iio/
H A Dsysfs.h58 #define IIO_ATTR_RO(_name, _addr) \ argument
59 { .dev_attr = __ATTR_RO(_name), \
62 #define IIO_ATTR_WO(_name, _addr) \ argument
63 { .dev_attr = __ATTR_WO(_name), \
66 #define IIO_ATTR_RW(_name, _addr) \ argument
67 { .dev_attr = __ATTR_RW(_name), \
71 struct iio_dev_attr iio_dev_attr_##_name \
76 = IIO_ATTR_RO(_name, _addr)
80 = IIO_ATTR_WO(_name, _addr)
84 = IIO_ATTR_RW(_name, _addr)
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/linux-6.15/drivers/staging/rtl8723bs/hal/
H A Dodm_interface.h16 #define _reg_all(_name) ODM_##_name argument
17 #define _reg_ic(_name, _ic) ODM_##_name##_ic argument
18 #define _bit_all(_name) BIT_##_name argument
19 #define _bit_ic(_name, _ic) BIT_##_name##_ic argument
29 #define _reg_11N(_name) ODM_REG_##_name##_11N argument
30 #define _bit_11N(_name) ODM_BIT_##_name##_11N argument
32 #define _cat(_name, _ic_type, _func) _func##_11N(_name) argument
37 #define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) argument
38 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) argument
/linux-6.15/drivers/thermal/qcom/
H A Dtsens.h122 [_name##_##1] = REG_FIELD(_offset, 1, 1), \
123 [_name##_##2] = REG_FIELD(_offset, 2, 2), \
124 [_name##_##3] = REG_FIELD(_offset, 3, 3), \
125 [_name##_##4] = REG_FIELD(_offset, 4, 4), \
126 [_name##_##5] = REG_FIELD(_offset, 5, 5), \
127 [_name##_##6] = REG_FIELD(_offset, 6, 6), \
128 [_name##_##7] = REG_FIELD(_offset, 7, 7), \
129 [_name##_##8] = REG_FIELD(_offset, 8, 8), \
130 [_name##_##9] = REG_FIELD(_offset, 9, 9), \
136 [_name##_##15] = REG_FIELD(_offset, 15, 15)
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/linux-6.15/drivers/clk/sprd/
H A Dgate.h42 .hw.init = _fn(_name, _parent, \
50 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
56 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
66 #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \ argument
68 SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
75 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
85 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
97 #define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \ argument
100 SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
104 #define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \ argument
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/linux-6.15/drivers/clk/renesas/
H A Drzg2l-cpg.h146 #define DEF_TYPE(_name, _id, _type...) \ argument
147 { .name = _name, .id = _id, .type = _type }
148 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
149 DEF_TYPE(_name, _id, _type, .parent = _parent)
150 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
155 #define DEF_INPUT(_name, _id) \ argument
156 DEF_TYPE(_name, _id, CLK_TYPE_IN)
195 #define DEF_DSI_DIV(_name, _id, _parent, _flag) \ argument
219 .name = _name, \
290 #define DEF_PD(_name, _id, _mstop_conf, _flags) \ argument
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H A Drcar-gen4-cpg.h35 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument
38 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument
39 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset)
42 DEF_BASE(_name, _id, CLK_TYPE_GEN4_MDSEL, \
46 #define DEF_GEN4_OSC(_name, _id, _parent, _div) \ argument
47 DEF_BASE(_name, _id, CLK_TYPE_GEN4_OSC, _parent, .div = _div)
49 #define DEF_GEN4_PLL_F8_25(_name, _idx, _id, _parent) \ argument
52 #define DEF_GEN4_PLL_V8_25(_name, _idx, _id, _parent) \ argument
55 #define DEF_GEN4_PLL_F9_24(_name, _idx, _id, _parent) \ argument
58 #define DEF_GEN4_PLL_V9_24(_name, _idx, _id, _parent) \ argument
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H A Drcar-gen3-cpg.h37 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument
40 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
44 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
50 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \
53 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
57 DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \
63 #define DEF_FIXED_RPCSRC_E3(_name, _id, _parent0, _parent1) \ argument
64 DEF_BASE(_name, _id, CLK_TYPE_GEN3_E3_RPCSRC, \
66 #define DEF_FIXED_RPCSRC_D3(_name, _id, _parent0, _parent1) \ argument
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H A Drenesas-cpg-mssr.h44 #define DEF_TYPE(_name, _id, _type...) \ argument
45 { .name = _name, .id = _id, .type = _type }
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
47 DEF_TYPE(_name, _id, _type, .parent = _parent)
49 #define DEF_INPUT(_name, _id) \ argument
50 DEF_TYPE(_name, _id, CLK_TYPE_IN)
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
57 #define DEF_RATE(_name, _id, _rate) \ argument
58 DEF_TYPE(_name, _id, CLK_TYPE_FR, .mult = _rate)
75 #define DEF_MOD(_name, _mod, _parent...) \ argument
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H A Drzv2h-cpg.h96 #define DEF_TYPE(_name, _id, _type...) \ argument
97 { .name = _name, .id = _id, .type = _type }
98 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
99 DEF_TYPE(_name, _id, _type, .parent = _parent)
100 #define DEF_PLL(_name, _id, _parent, _conf) \ argument
102 #define DEF_INPUT(_name, _id) \ argument
103 DEF_TYPE(_name, _id, CLK_TYPE_IN)
104 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
106 #define DEF_DDIV(_name, _id, _parent, _ddiv_packed, _dtable) \ argument
107 DEF_TYPE(_name, _id, CLK_TYPE_DDIV, \
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/linux-6.15/drivers/clk/sophgo/
H A Dclk-cv18xx-ip.h70 struct cv1800_clk_gate _name = { \
108 struct cv1800_clk_div _name = \
116 struct cv1800_clk_bypass_div _name = { \
117 .div = _CV1800_DIV(_name, _parent, \
128 struct cv1800_clk_div _name = \
129 _CV1800_FIXED_DIV(_name, _parent, \
167 struct cv1800_clk_mux _name = \
179 .mux = _CV1800_MUX(_name, _parent, \
199 struct cv1800_clk_mmux _name = { \
226 #define CV1800_ACLK(_name, _parent, \ argument
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/linux-6.15/drivers/clk/starfive/
H A Dclk-starfive-jh71x0.h34 .name = _name, \
42 .name = _name, \
50 .name = _name, \
56 #define JH71X0_FDIV(_idx, _name, _parent) \ argument
58 .name = _name, \
66 .name = _name, \
74 .name = _name, \
83 .name = _name, \
91 .name = _name, \
98 #define JH71X0__INV(_idx, _name, _parent) \ argument
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/linux-6.15/drivers/clk/sunxi-ng/
H A Dccu_div.h96 .hw.init = CLK_HW_INIT(_name, \
119 .hw.init = CLK_HW_INIT_HW(_name, \
139 .hw.init = CLK_HW_INIT_PARENTS(_name, \
158 .hw.init = CLK_HW_INIT_PARENTS(_name, \
169 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
188 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
203 .hw.init = CLK_HW_INIT(_name, \
212 SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
225 .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
250 .hw.init = CLK_HW_INIT_PARENTS_HW(_name, \
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H A Dccu_mp.h48 .hw.init = CLK_HW_INIT_PARENTS(_name, \
70 .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
89 .hw.init = CLK_HW_INIT_PARENTS(_name, \
96 #define SUNXI_CCU_MP_WITH_MUX(_struct, _name, _parents, _reg, \ argument
101 SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
123 .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
143 .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
155 SUNXI_CCU_MP_DATA_WITH_MUX_GATE_FEAT(_struct, _name, _parents, \
166 SUNXI_CCU_MP_DATA_WITH_MUX_GATE_FEAT(_struct, _name, _parents, \
196 .hw.init = CLK_HW_INIT_PARENTS_HW(_name, \
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/linux-6.15/drivers/regulator/
H A Dmc13xxx.h56 [prefix ## _name] = { \
63 .id = prefix ## _name, \
67 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
69 .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
70 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
74 [prefix ## _name] = { \
81 .id = prefix ## _name, \
85 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
89 [prefix ## _name] = { \
96 .id = prefix ## _name, \
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/linux-6.15/include/rdma/
H A Dib_sysfs.h21 #define IB_PORT_ATTR_RW(_name) \ argument
22 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RW(_name)
24 #define IB_PORT_ATTR_ADMIN_RW(_name) \ argument
25 struct ib_port_attribute ib_port_attr_##_name = \
26 __ATTR_RW_MODE(_name, 0600)
28 #define IB_PORT_ATTR_RO(_name) \ argument
29 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RO(_name)
31 #define IB_PORT_ATTR_WO(_name) \ argument
32 struct ib_port_attribute ib_port_attr_##_name = __ATTR_WO(_name)
/linux-6.15/arch/riscv/include/asm/
H A Dcpufeature.h42 .name = #_name, \
43 .property = #_name, \
50 #define __RISCV_ISA_EXT_DATA(_name, _id) _RISCV_ISA_EXT_DATA(_name, _id, NULL, 0, NULL) argument
52 #define __RISCV_ISA_EXT_DATA_VALIDATE(_name, _id, _validate) \ argument
53 _RISCV_ISA_EXT_DATA(_name, _id, NULL, 0, _validate)
56 #define __RISCV_ISA_EXT_BUNDLE(_name, _bundled_exts) \ argument
57 _RISCV_ISA_EXT_DATA(_name, RISCV_ISA_EXT_INVALID, _bundled_exts, \
59 #define __RISCV_ISA_EXT_BUNDLE_VALIDATE(_name, _bundled_exts, _validate) \ argument
60 _RISCV_ISA_EXT_DATA(_name, RISCV_ISA_EXT_INVALID, _bundled_exts, \
64 #define __RISCV_ISA_EXT_SUPERSET(_name, _id, _sub_exts) \ argument
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/linux-6.15/drivers/clk/mediatek/
H A Dclk-mtk.h37 #define GATE_DUMMY(_id, _name) { \ argument
39 .name = _name, \
51 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
53 .name = _name, \
74 .name = _name, \
81 #define FACTOR(_id, _name, _parent, _mult, _div) \ argument
115 .name = _name, \
146 MUX_FLAGS(_id, _name, _parents, _reg, \
151 .name = _name, \
166 .name = _name, \
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H A Dclk-mt8188-infra_ao.c46 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
49 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
50 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
53 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
56 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
57 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
59 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ argument
70 #define GATE_INFRA_AO3(_id, _name, _parent, _shift) \ argument
71 GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, 0)
77 #define GATE_INFRA_AO4(_id, _name, _parent, _shift) \ argument
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/linux-6.15/tools/perf/tests/
H A Dtests.h51 #define TEST_CASE(description, _name) \ argument
53 .name = #_name, \
55 .run_case = test__##_name, \
60 .name = #_name, \
62 .run_case = test__##_name, \
68 .name = #_name, \
70 .run_case = test__##_name, \
76 TEST_CASE(description, _name), \
79 struct test_suite suite__##_name = { \
81 .test_cases = tests__##_name, \
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/linux-6.15/include/trace/events/
H A Dmmflags.h111 #define IF_HAVE_PG_MLOCK(_name) ,{1UL << PG_##_name, __stringify(_name)} argument
113 #define IF_HAVE_PG_MLOCK(_name) argument
117 #define IF_HAVE_PG_HWPOISON(_name) ,{1UL << PG_##_name, __stringify(_name)} argument
119 #define IF_HAVE_PG_HWPOISON(_name) argument
123 #define IF_HAVE_PG_IDLE(_name) ,{1UL << PG_##_name, __stringify(_name)} argument
125 #define IF_HAVE_PG_IDLE(_name) argument
129 #define IF_HAVE_PG_ARCH_2(_name) ,{1UL << PG_##_name, __stringify(_name)} argument
131 #define IF_HAVE_PG_ARCH_2(_name) argument
135 #define IF_HAVE_PG_ARCH_3(_name) ,{1UL << PG_##_name, __stringify(_name)} argument
137 #define IF_HAVE_PG_ARCH_3(_name) argument
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