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Searched refs:VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h12594 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK 0xffffffffL macro
H A Dgfx_7_2_sh_mask.h15493 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK 0xffffffff macro
H A Dgfx_8_0_sh_mask.h17627 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK 0xffffffff macro
H A Dgfx_8_1_sh_mask.h18215 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK 0xffffffff macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h17172 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_9_1_sh_mask.h18479 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_9_2_1_sh_mask.h18369 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_9_4_3_sh_mask.h20499 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_9_4_2_sh_mask.h10614 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_11_5_0_sh_mask.h18367 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_11_0_0_sh_mask.h22391 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_12_0_0_sh_mask.h13730 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_10_1_0_sh_mask.h24683 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_11_0_3_sh_mask.h24729 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro
H A Dgc_10_3_0_sh_mask.h22882 #define VGT_HOS_MAX_TESS_LEVEL__MAX_TESS_MASK … macro