Home
last modified time | relevance | path

Searched refs:TSC (Results 1 – 25 of 40) sorted by relevance

12

/linux-6.15/Documentation/virt/kvm/x86/
H A Dtimekeeping.rst14 3) TSC Hardware
324 3. TSC Hardware
356 3.1. TSC synchronization
367 write the full 64-bits of the TSC, it may be impossible to match the TSC in
374 3.2. TSC and CPU hotplug
382 TSC is synchronized back to a state where TSC synchronization flaws, however
404 3.4. TSC and C-states
408 states may be problematic for TSC as well. The TSC may stop advancing in such
445 3.7. TSC virtualization - VMX
559 the TSC is much higher precision, many possible values of the TSC may be read
[all …]
H A Dhypercalls.rst130 * tsc: guest TSC value used to calculate sec/nsec pair
134 host and guest. The guest can use the returned TSC value to
137 Returns KVM_EOPNOTSUPP if the host does not use TSC clocksource,
/linux-6.15/Documentation/virt/hyperv/
H A Dclocks.rst26 also provides access to the virtualized TSC via the RDTSC and
27 related instructions. These TSC instructions do not trap to
29 Hyper-V performs TSC calibration, and provides the TSC frequency
31 in Linux reads this MSR to get the frequency, so it skips TSC
42 value, the guest reads the TSC and then applies the scale and offset
45 to a host with a different TSC frequency, Hyper-V adjusts the
50 support for TSC frequency scaling to enable live migration of VMs
51 across Hyper-V hosts where the TSC frequency may be different.
53 available, it prefers to use Linux's standard TSC-based clocksource.
62 space code performs the same algorithm of reading the TSC and
/linux-6.15/tools/power/cpupower/utils/idle_monitor/
H A Dnhm_idle.c27 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF }; enumerator
89 case TSC: in nhm_get_count()
131 nhm_get_count(TSC, &tsc_at_measure_start, base_cpu); in nhm_start()
139 nhm_get_count(TSC, &dbg, base_cpu); in nhm_start()
150 nhm_get_count(TSC, &tsc_at_measure_end, base_cpu); in nhm_stop()
158 nhm_get_count(TSC, &dbg, base_cpu); in nhm_stop()
H A Dhsw_ext_idle.c26 TSC = 0xFFFF }; enumerator
77 case TSC: in hsw_ext_get_count()
124 hsw_ext_get_count(TSC, &tsc_at_measure_start, base_cpu); in hsw_ext_start()
133 hsw_ext_get_count(TSC, &tsc_at_measure_end, base_cpu); in hsw_ext_stop()
H A Dsnb_idle.c24 enum intel_snb_id { C7 = 0, PC2, PC7, SNB_CSTATE_COUNT, TSC = 0xFFFF }; enumerator
75 case TSC: in snb_get_count()
122 snb_get_count(TSC, &tsc_at_measure_start, base_cpu); in snb_start()
131 snb_get_count(TSC, &tsc_at_measure_end, base_cpu); in snb_stop()
/linux-6.15/Documentation/virt/kvm/devices/
H A Dvcpu.rst208 :Parameters: 64-bit unsigned TSC offset
218 Specifies the guest's TSC offset relative to the host's TSC. The guest's
219 TSC is then derived by the following equation:
223 This attribute is useful to adjust the guest's TSC on live migration,
224 so that the TSC counts the time during which the VM was paused. The
229 1. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_src),
234 guest TSC offset (ofs_src[i]).
237 guest's TSC (freq).
253 5. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_dest) and
256 6. Adjust the guest TSC offsets for every vCPU to account for (1) time
[all …]
/linux-6.15/Documentation/devicetree/bindings/input/touchscreen/
H A Dlpc32xx-tsc.txt1 * NXP LPC32xx SoC Touchscreen Controller (TSC)
7 - interrupts: The TSC/ADC interrupt
/linux-6.15/Documentation/translations/zh_CN/virt/acrn/
H A Dcpuid.rst56 eax = (Virtual) TSC frequency in kHz.
/linux-6.15/tools/perf/Documentation/
H A Dperf-intel-pt.txt266 So, to disable TSC packets use:
1315 using 'perf inject' and requires unchanging VMX TSC Offset and no VMX TSC Scaling.
1431 ERROR: Unknown TSC Offset for VMCS 0x1bff6a
1432 VMCS: 0x1bff6a TSC Offset 0xffffe42722c64c41
1433 ERROR: Unknown TSC Offset for VMCS 0x1cbc08
1434 VMCS: 0x1cbc08 TSC Offset 0xffffe42722c64c41
1435 ERROR: Unknown TSC Offset for VMCS 0x1c3ce8
1436 VMCS: 0x1c3ce8 TSC Offset 0xffffe42722c64c41
1437 ERROR: Unknown TSC Offset for VMCS 0x1cbce9
1441 shown above with the calculated TSC Offset. For an unchanging TSC Offset
[all …]
H A Dperf-inject.txt101 x86 the TSC Offset and Multiplier could be provided for a virtual machine
/linux-6.15/Documentation/virt/acrn/
H A Dcpuid.rst46 eax = (Virtual) TSC frequency in kHz.
/linux-6.15/Documentation/devicetree/bindings/mfd/
H A Dfsl-imx25-tsadc.txt1 Freescale MX25 ADC/TSC MultiFunction Device (MFD)
/linux-6.15/include/dt-bindings/clock/
H A Dstm32mp13-clks.h101 #define TSC 73 macro
/linux-6.15/Documentation/devicetree/bindings/timer/
H A Dnvidia,tegra186-timer.yaml15 reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be
/linux-6.15/Documentation/driver-api/hte/
H A Dtegra-hte.rst11 from the system counter TSC which has 31.25MHz clock rate, and the driver
/linux-6.15/Documentation/devicetree/bindings/iio/adc/
H A Damlogic,meson-saradc.yaml58 Syscon which contains the 5th bit of the TSC (temperature sensor
/linux-6.15/arch/x86/
H A DKconfig.cpu24 - "586" for generic Pentium CPUs lacking the TSC
164 like a 586 with TSC, and sets some GCC optimization flags (like a
178 treat this chip as a 586TSC with some extended instructions
186 treat this chip as a 586TSC with some extended instructions
/linux-6.15/Documentation/devicetree/bindings/thermal/
H A Drcar-gen3-thermal.yaml11 On most R-Car Gen3 and later SoCs, the thermal sensor controllers (TSC)
/linux-6.15/Documentation/tools/rtla/
H A Drtla-hwnoise.rst80 and disabling the TSC watchdog to remove the NMI (it is possible to identify
/linux-6.15/Documentation/trace/
H A Dhwlat_detector.rst26 for some period, then looking for gaps in the TSC data. Any gap indicates a
/linux-6.15/drivers/pinctrl/tegra/
H A Dpinctrl-tegra234.c1902 PINGROUP(can0_stb_paa4, RSVD0, WDT, TSC, TSC_ALT, 0x3020, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1905 PINGROUP(can0_err_paa7, RSVD0, TSC, RSVD2, TSC_ALT, 0x3038, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1908 PINGROUP(soc_gpio50_pbb2, RSVD0, TSC, RSVD2, TSC_ALT, 0x3050, 0, Y, -1, 5, 6, -1, 9, 10, 12),
1909 PINGROUP(can1_err_pbb3, RSVD0, TSC, RSVD2, TSC_ALT, 0x3058, 0, Y, -1, 5, 6, -1, 9, 10, 12),
/linux-6.15/drivers/net/wireless/admtek/
H A Dadm8211.h64 __le32 TSC; /* 0xC0 CSR32 */ member
/linux-6.15/tools/arch/x86/kcpuid/
H A Dcpuid.csv468 # Intel TSC (Time Stamp Counter) enumeration
470 …0x15, 0, eax, 31:0, tsc_denominator , Denominator of the TSC/'core crystal c…
471 …0x15, 0, ebx, 31:0, tsc_numerator , Numerator of the TSC/'core crystal clo…
778 0x80000007, 0, edx, 8, constant_tsc , TSC ticks at constant rate across…
834 0x8000000a, 0, edx, 4, tsc_scale , MSR based TSC rate control
962 0x8000001f, 0, eax, 8, secure_tsc , Secure TSC supported
/linux-6.15/arch/arm/boot/dts/nxp/lpc/
H A Dlpc32xx.dtsi430 * TSC vs. ADC: Since those two share the same

12