Searched refs:SET0 (Results 1 – 4 of 4) sorted by relevance
190 (SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + SET0); in ipi_set0_regs_init()192 (SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + SET0); in ipi_set0_regs_init()194 (SMP_CORE_GROUP0_BASE + SMP_CORE2_OFFSET + SET0); in ipi_set0_regs_init()196 (SMP_CORE_GROUP0_BASE + SMP_CORE3_OFFSET + SET0); in ipi_set0_regs_init()198 (SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + SET0); in ipi_set0_regs_init()200 (SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + SET0); in ipi_set0_regs_init()202 (SMP_CORE_GROUP1_BASE + SMP_CORE2_OFFSET + SET0); in ipi_set0_regs_init()204 (SMP_CORE_GROUP1_BASE + SMP_CORE3_OFFSET + SET0); in ipi_set0_regs_init()206 (SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + SET0); in ipi_set0_regs_init()208 (SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + SET0); in ipi_set0_regs_init()[all …]
23 #define SET0 0x08 macro
40 (MSI SET0) (MSI SET1) ... (MSI SET7)
358 * CPLD firmware maps SET0, SET1 and SET2