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Searched refs:SCLK_UART5 (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Drockchip,rk3562-cru.h206 #define SCLK_UART5 194 macro
H A Dpx30-cru.h30 #define SCLK_UART5 28 macro
H A Drockchip,rk3528-cru.h46 #define SCLK_UART5 34 macro
H A Drockchip,rk3576-cru.h162 #define SCLK_UART5 144 macro
H A Drockchip,rv1126-cru.h98 #define SCLK_UART5 32 macro
H A Drockchip,rk3588-cru.h202 #define SCLK_UART5 187 macro
H A Drk3568-cru.h367 #define SCLK_UART5 303 macro
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3528.dtsi429 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
H A Drk356x-base.dtsi1390 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
H A Drk3576.dtsi1774 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
H A Dpx30.dtsi563 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
H A Drk3588-base.dtsi2378 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
/linux-6.15/drivers/clk/rockchip/
H A Dclk-px30.c723 GATE(SCLK_UART5, "clk_uart5", "clk_uart5_mux", CLK_SET_RATE_PARENT,
H A Dclk-rv1126.c510 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
H A Dclk-rk3528.c357 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
H A Dclk-rk3562.c651 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
H A Dclk-rk3568.c1266 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
H A Dclk-rk3576.c676 COMPOSITE(SCLK_UART5, "sclk_uart5", clk_uart_p, 0,
H A Dclk-rk3588.c1261 GATE(SCLK_UART5, "sclk_uart5", "clk_uart5", 0,
/linux-6.15/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi516 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;