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Searched refs:RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9458 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h9936 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT 0x0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27329 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_9_1_sh_mask.h28612 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h28953 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h30712 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h14526 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h39876 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h36533 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h36593 #define RLC_GPU_IOV_ACTIVE_FCN_ID__VF_ID__SHIFT … macro