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Searched refs:RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7064 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK 0x10000000L macro
H A Dgfx_7_2_sh_mask.h7897 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK 0x10000000 macro
H A Dgfx_8_0_sh_mask.h8815 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK 0x10000000 macro
H A Dgfx_8_1_sh_mask.h9365 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK 0x10000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23132 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_9_1_sh_mask.h24419 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_9_2_1_sh_mask.h24480 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_9_4_3_sh_mask.h26741 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_9_4_2_sh_mask.h21929 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_11_5_0_sh_mask.h30075 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_11_0_0_sh_mask.h34447 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_12_0_0_sh_mask.h20179 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_10_1_0_sh_mask.h33589 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_11_0_3_sh_mask.h37740 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro
H A Dgc_10_3_0_sh_mask.h32594 #define RLC_CGCG_CGLS_CTRL__CGCG_REG_CTRL_MASK … macro