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Searched refs:PUNIT_REG_DSPSSPM (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/
H A Dvlv_sideband_reg.h37 #define PUNIT_REG_DSPSSPM 0x36 macro
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c1669 state = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe); in chv_pipe_power_well_enabled()
1682 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSC_MASK(pipe); in chv_pipe_power_well_enabled()
1704 ((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & DP_SSS_MASK(pipe)) == state) in chv_set_pipe_power_well()
1709 ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_pipe_power_well()
1712 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, ctrl); in chv_set_pipe_power_well()
1718 vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM)); in chv_set_pipe_power_well()
H A Dintel_cdclk.c581 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_get_cdclk()
666 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_set_cdclk()
669 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in vlv_set_cdclk()
670 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & in vlv_set_cdclk()
751 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_cdclk()
754 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in chv_set_cdclk()
755 if (wait_for((vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM) & in chv_set_cdclk()
H A Di9xx_wm.c135 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in chv_set_memory_pm5()
140 vlv_punit_write(dev_priv, PUNIT_REG_DSPSSPM, val); in chv_set_memory_pm5()
3919 val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM); in vlv_wm_get_hw_state()