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Searched refs:PLL_PPLL (Results 1 – 23 of 23) sorted by relevance

/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3566-powkiddy-rk2023.dts17 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-powkiddy-rgb30.dts17 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-powkiddy-rgb10max3.dts21 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-powkiddy-rgb20sx.dts47 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-anbernic-rg353x.dtsi82 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-anbernic-rg-arc.dtsi80 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-anbernic-rg503.dts171 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3528.dtsi329 <&cru PLL_PPLL>, <&cru PLL_CPLL>,
H A Drk3566-powkiddy-x55.dts352 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk3566-pinetab2.dtsi265 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
H A Drk356x-base.dtsi397 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
H A Drk3399-base.dtsi1561 assigned-clocks = <&pmucru PLL_PPLL>;
H A Drk3588-base.dtsi732 <&cru PLL_PPLL>, <&cru PLL_AUPLL>,
/linux-6.15/include/dt-bindings/clock/
H A Drockchip,rk3528-cru.h15 #define PLL_PPLL 3 macro
H A Drockchip,rk3576-cru.h22 #define PLL_PPLL 6 macro
H A Drk3399-cru.h340 #define PLL_PPLL 1 macro
H A Drockchip,rk3588-cru.h23 #define PLL_PPLL 8 macro
H A Drk3568-cru.h13 #define PLL_PPLL 1 macro
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rk3528.c191 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk3399.c236 [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, 0, RK3399_PMU_PLL_CON(0),
H A Dclk-rk3568.c319 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk3576.c381 [ppll] = PLL(pll_rk3588_ddr, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk3588.c672 [ppll] = PLL(pll_rk3588_core, PLL_PPLL, "ppll", mux_pll_p,