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Searched refs:MSPI (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/spi/
H A Dspi-bcm-qspi.c191 MSPI, enumerator
803 val = bcm_qspi_read(qspi, MSPI, offset); in read_rxram_slot_u32()
816 msb = bcm_qspi_read(qspi, MSPI, msb_offset); in read_rxram_slot_u64()
818 lsb = bcm_qspi_read(qspi, MSPI, lsb_offset); in read_rxram_slot_u64()
1005 bcm_qspi_write(qspi, MSPI, MSPI_NEWQP, 0); in write_to_hw()
1411 bcm_qspi_write(qspi, MSPI, MSPI_NEWQP, 0); in bcm_qspi_hw_init()
1412 bcm_qspi_write(qspi, MSPI, MSPI_ENDQP, 0); in bcm_qspi_hw_init()
1428 bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0); in bcm_qspi_hw_uninit()
1547 if (IS_ERR(qspi->base[MSPI])) in bcm_qspi_probe()
1548 return PTR_ERR(qspi->base[MSPI]); in bcm_qspi_probe()
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H A DKconfig224 tristate "Broadcom BSPI and MSPI controller support"
229 Enables support for the Broadcom SPI flash and MSPI controller.
232 flash device as well as MSPI device.
/linux-6.15/Documentation/devicetree/bindings/spi/
H A Dbrcm,spi-bcm-qspi.yaml17 MSPI : SPI master controller can read and write to a SPI slave device
18 BSPI : Broadcom SPI in combination with the MSPI hw IP provides acceleration
22 Supported Broadcom SoCs have one instance of MSPI+BSPI controller IP.
23 MSPI master can be used without BSPI. BRCMSTB SoCs have an additional instance
24 of a MSPI master without the BSPI to use with non flash slave devices that
33 - description: Second Instance of MSPI BRCMSTB SoCs
44 - description: Second Instance of MSPI BRCMSTB SoCs
100 - | # BRCMSTB SoC: SPI Master (MSPI+BSPI) for SPI-NOR access
128 - | # BRCMSTB SoC: MSPI master for any SPI device