Home
last modified time | relevance | path

Searched refs:GPLL0 (Results 1 – 25 of 109) sorted by relevance

12345

/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dqcom,mmcc.yaml117 - description: MMSS GPLL0 voted clock
118 - description: GPLL0 voted clock
145 - description: MMSS GPLL0 voted clock
146 - description: GPLL0 voted clock
184 - description: MMSS GPLL0 voted clock
185 - description: GPLL0 clock
186 - description: GPLL0 voted clock
H A Dqcom,sm6115-gpucc.yaml26 - description: GPLL0 main branch source
27 - description: GPLL0 main div source
H A Dqcom,gpucc-sdm660.yaml27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
H A Dqcom,qcm2290-dispcc.yaml26 - description: GPLL0 source from GCC
27 - description: GPLL0 div source from GCC
H A Dqcom,qcm2290-gpucc.yaml30 - description: GPLL0 main branch source
31 - description: GPLL0 div branch source
H A Dqcom,sm6375-gpucc.yaml26 - description: GPLL0 main branch source
27 - description: GPLL0 div branch source
H A Dqcom,sm8450-gpucc.yaml40 - description: GPLL0 main branch source
41 - description: GPLL0 div branch source
H A Dqcom,sdm845-dispcc.yaml28 - description: GPLL0 source from GCC
29 - description: GPLL0 div source from GCC
H A Dqcom,gpucc.yaml47 - description: GPLL0 main branch source
48 - description: GPLL0 div branch source
H A Dqcom,sm6125-gpucc.yaml26 - description: GPLL0 main branch source
H A Dqcom,msm8998-gpucc.yaml25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
H A Dqcom,sm6375-dispcc.yaml28 - description: GPLL0 source from GCC
H A Dqcom,sm6115-dispcc.yaml29 - description: GPLL0 DISP DIV clock from GCC
/linux-6.15/Documentation/devicetree/bindings/interconnect/
H A Dqcom,osm-l3.yaml67 #define GPLL0 165
74 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
/linux-6.15/include/dt-bindings/clock/
H A Dqcom,gcc-mdm9607.h9 #define GPLL0 0 macro
H A Dqcom,gcc-sdx55.h10 #define GPLL0 3 macro
H A Dqcom,gcc-sdx65.h10 #define GPLL0 0 macro
H A Dqcom,gcc-sdm660.h111 #define GPLL0 101 macro
H A Dqcom,gcc-sc7180.h11 #define GPLL0 1 macro
H A Dqcom,ipq5424-gcc.h10 #define GPLL0 0 macro
H A Dqcom,gcc-sm6350.h11 #define GPLL0 0 macro
H A Dqcom,gcc-msm8994.h11 #define GPLL0 1 macro
H A Dqcom,gcc-qcm2290.h10 #define GPLL0 0 macro
H A Dqcom,gcc-msm8916.h9 #define GPLL0 0 macro
/linux-6.15/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,msm8996-mss-pil.yaml220 - description: GCC MSS GPLL0 clock
255 - description: GCC MSS GPLL0 clock
292 - description: GCC MSS GPLL0 clock

12345