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Searched refs:DSPADDR (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Di9xx_plane.c513 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i9xx_plane_update_arm()
557 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0); in i9xx_plane_disable_arm()
591 error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane)); in i8xx_plane_capture_error()
1193 base = intel_de_read(display, DSPADDR(display, i9xx_plane)); in i9xx_get_initial_plane_config()
1245 intel_de_write(display, DSPADDR(display, i9xx_plane), base); in i9xx_fixup_initial_plane_config()
H A Di9xx_plane_regs.h49 #define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR) macro
H A Dintel_fbc.c370 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i8xx_fbc_nuke()
371 intel_de_read_fw(display, DSPADDR(display, i9xx_plane))); in i8xx_fbc_nuke()
/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c172 MMIO_D(DSPADDR(dev_priv, PIPE_A)); in iterate_generic_mmio()
181 MMIO_D(DSPADDR(dev_priv, PIPE_B)); in iterate_generic_mmio()
190 MMIO_D(DSPADDR(dev_priv, PIPE_C)); in iterate_generic_mmio()