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Searched refs:DEF_REG_CONF (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/clk/renesas/
H A Dr9a08g045-cpg.c299 DEF_REG_CONF(0, 0),
302 DEF_REG_CONF(CPG_BUS_ACPU_MSTOP, BIT(3)),
305 DEF_REG_CONF(CPG_BUS_PERI_CPU_MSTOP, BIT(13)),
311 DEF_REG_CONF(CPG_BUS_REG0_MSTOP, BIT(0)),
346 DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(1)), 0),
348 DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(2)), 0),
350 DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(3)), 0),
352 DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(4)), 0),
354 DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(5)), 0),
356 DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(4)), 0),
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H A Drzg2l-cpg.h265 #define DEF_REG_CONF(_off, _mask) ((struct rzg2l_cpg_reg_conf) { .off = (_off), .mask = (_mask) }) macro