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Searched refs:CP_STAT__ROQ_CE_RING_BUSY_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3088 #define CP_STAT__ROQ_CE_RING_BUSY_MASK 0x10000000L macro
H A Dgfx_7_2_sh_mask.h3005 #define CP_STAT__ROQ_CE_RING_BUSY_MASK 0x10000000 macro
H A Dgfx_8_0_sh_mask.h3621 #define CP_STAT__ROQ_CE_RING_BUSY_MASK 0x10000000 macro
H A Dgfx_8_1_sh_mask.h4143 #define CP_STAT__ROQ_CE_RING_BUSY_MASK 0x10000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1110 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h1009 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h976 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_4_3_sh_mask.h1026 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1609 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3663 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6510 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_12_0_0_sh_mask.h6962 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6598 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h7285 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6837 #define CP_STAT__ROQ_CE_RING_BUSY_MASK … macro