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Searched refs:CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2901 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h3176 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3790 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4312 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT 0x10 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1282 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_1_sh_mask.h1181 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1148 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1198 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1781 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h3778 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6625 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h7066 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6766 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h7400 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7032 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY__SHIFT … macro