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Searched refs:CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2597 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT 0x00000001 macro
H A Dgfx_7_2_sh_mask.h1438 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT 0x1 macro
H A Dgfx_8_0_sh_mask.h1882 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT 0x1 macro
H A Dgfx_8_1_sh_mask.h2404 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT 0x1 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11211 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_9_1_sh_mask.h12688 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12486 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h14306 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2595 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h18174 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16525 #define CP_MEM_SLP_CNTL__CP_MEM_DS_EN__SHIFT … macro