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Searched refs:CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2395 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT 0x0000001e macro
H A Dgfx_7_2_sh_mask.h1216 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT 0x1e macro
H A Dgfx_8_0_sh_mask.h1550 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT 0x1e macro
H A Dgfx_8_1_sh_mask.h2074 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT 0x1e macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11032 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12509 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12313 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h14040 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2329 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h12253 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15437 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17974 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17592 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16238 #define CP_INT_CNTL_RING1__GENERIC1_INT_ENABLE__SHIFT … macro