Home
last modified time | relevance | path

Searched refs:CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4119 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK 0x80000000 macro
H A Dgfx_8_1_sh_mask.h4641 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK 0x80000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13100 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_9_1_sh_mask.h14400 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_9_2_1_sh_mask.h14265 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_9_4_3_sh_mask.h16634 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_9_4_2_sh_mask.h4198 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_11_5_0_sh_mask.h14337 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_11_0_0_sh_mask.h17643 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_10_1_0_sh_mask.h20523 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_11_0_3_sh_mask.h19888 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro
H A Dgc_10_3_0_sh_mask.h18676 #define CP_HQD_EOP_CONTROL__PEND_SIG_SEM_MASK … macro