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Searched refs:CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19542 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_9_1_sh_mask.h20849 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_9_2_1_sh_mask.h20776 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_9_4_3_sh_mask.h22906 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_9_4_2_sh_mask.h13003 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_11_5_0_sh_mask.h22911 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_11_0_0_sh_mask.h26899 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_12_0_0_sh_mask.h14726 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_10_1_0_sh_mask.h27460 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_11_0_3_sh_mask.h29399 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro
H A Dgc_10_3_0_sh_mask.h25721 #define CP_DMA_CNTL__UTCL1_FAULT_CONTROL_MASK … macro