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Searched refs:CPM (Results 1 – 25 of 29) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/powerpc/4xx/
H A Dcpm.txt1 PPC4xx Clock Power Management (CPM) node
9 - er-offset : All 4xx SoCs with a CPM controller have
10 one of two different order for the CPM
11 registers. Some have the CPM registers
18 in CPM will be set to turn off unused
22 in CPM will be set to turn off unused
23 devices. This is usually just CPM[CPU].
26 in CPM will be set on standby and
30 in CPM will be set on suspend (mem) and
/linux-6.15/drivers/soc/fsl/qe/
H A DKconfig14 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
37 tristate "CPM/QE TSA support"
40 ((CPM || QUICC_ENGINE) && COMPILE_TEST)
42 Freescale CPM/QE Time Slot Assigner (TSA)
49 tristate "CPM/QE QMC support"
54 Freescale CPM/QE QUICC Multichannel Controller
/linux-6.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dcpm.txt7 * Root CPM node
22 * Properties common to multiple CPM/QE devices
25 to specify the device on which a CPM command operates.
38 The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
47 CPM-side offsets with pointer subtraction. It is recommended that
H A Dfsl,qe.yaml16 in with the CPM binding later in this document.
38 enum: [QE, CPM, CPM2]
H A Dfsl,cpm1-scc-qmc.yaml7 title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
38 description: SCC interrupt line in the CPM interrupt controller
H A Dfsl,cpm1-tsa.yaml7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
/linux-6.15/Documentation/devicetree/bindings/pci/
H A Dxilinx-versal-cpm.yaml7 title: CPM Host Controller device tree for Xilinx Versal SoCs
25 - description: CPM system level control and status registers.
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-bus-platform-devices-ampere-smpro37 …| CPM (core) | 0 | 0 | Snoop-Logic | CPM # …
39 …| CPM (core) | 0 | 2 | Armv8 Core 1 | CPM # …
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dfsl,cpm-mdio.yaml7 title: Freescale CPM MDIO Device
/linux-6.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Dpincfg.txt24 QE and two options for CPM.
H A Ducc.txt18 CPM UART driver, the port-number is required for the QE UART driver.
/linux-6.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/
H A Di2c.txt3 The I2C controller is expressed as a bus under the CPM node.
/linux-6.15/arch/powerpc/platforms/8xx/
H A DKconfig4 select CPM
94 menu "MPC8xx CPM Options"
/linux-6.15/arch/powerpc/
H A DKconfig.debug235 bool "Early serial debugging for Freescale CPM-based serial ports"
239 using a CPM-based serial port. This assumes that the bootwrapper
240 has run, and set up the CPM in a particular way.
339 hex "CPM UART early debug transmit descriptor address"
H A DKconfig1139 PPC4xx Clock Power Management (CPM) support (suspend/resume).
/linux-6.15/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi65 /* CON15,16 - CPM lane 4 */
245 /* CPM Lane 5 - U29 */
H A Darmada-7040-db.dts146 * SPI on CPM and NAND have common pins on this board. We can
H A Darmada-cp11x.dtsi476 * this controller is only usable on the CPM
/linux-6.15/Documentation/devicetree/bindings/gpio/
H A D8xxx_gpio.txt3 This is for the non-QE/CPM/GUTs GPIO controllers as found on
/linux-6.15/drivers/pci/controller/
H A Dpcie-xilinx-cpm.c84 CPM, enumerator
637 .version = CPM,
H A DKconfig341 bool "Xilinx Versal CPM PCI controller"
346 Xilinx Versal CPM host bridge.
/linux-6.15/arch/powerpc/platforms/
H A DKconfig243 select CPM
264 config CPM config
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru.dtsi764 * Since our pcie doesn't support ClockPM(CPM), we want
766 * de-assert it along and make ClockPM(CPM) work.
/linux-6.15/drivers/usb/gadget/udc/
H A DKconfig316 tristate "Freescale QE/CPM USB Device Controller"
317 depends on FSL_SOC && (QUICC_ENGINE || CPM)
/linux-6.15/drivers/tty/serial/
H A DKconfig774 tristate "CPM SCC/SMC serial port support"
782 bool "Support for console on CPM SCC/SMC serial port"
786 Say Y here if you wish to use a SCC or SMC CPM UART as the system

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