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Searched refs:CLK_TOP_UNIVPLL_D6 (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Dmt8516-clk.h56 #define CLK_TOP_UNIVPLL_D6 24 macro
H A Dmt8192-clk.h107 #define CLK_TOP_UNIVPLL_D6 95 macro
H A Dmediatek,mt8188-clk.h131 #define CLK_TOP_UNIVPLL_D6 120 macro
H A Dmt8195-clk.h164 #define CLK_TOP_UNIVPLL_D6 152 macro
/linux-6.15/drivers/clk/mediatek/
H A Dclk-mt8516.c51 FACTOR(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6),
H A Dclk-mt8167.c54 FACTOR(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6),
H A Dclk-mt8188-topckgen.c55 FACTOR(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6),
H A Dclk-mt8192.c53 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6, 0),
H A Dclk-mt8195-topckgen.c66 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6, "univpll_d6", "univpll", 1, 6, 0),
/linux-6.15/arch/arm64/boot/dts/mediatek/
H A Dmt8188.dtsi2400 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;
2404 <&topckgen CLK_TOP_UNIVPLL_D6>;
2423 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;
2427 <&topckgen CLK_TOP_UNIVPLL_D6>;
H A Dmt8195.dtsi1243 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;
1254 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6>;