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Searched refs:CLK_PWM1 (Results 1 – 25 of 30) sorted by relevance

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/linux-6.15/include/dt-bindings/clock/
H A Dactions,s500-cmu.h44 #define CLK_PWM1 24 macro
H A Dpxa-clock.h48 #define CLK_PWM1 38 macro
H A Dactions,s700-cmu.h67 #define CLK_PWM1 44 macro
H A Dactions,s900-cmu.h69 #define CLK_PWM1 51 macro
H A Dsprd,sc9863a-clk.h121 #define CLK_PWM1 16 macro
H A Dsprd,ums512-clk.h135 #define CLK_PWM1 7 macro
H A Dsprd,sc9860-clk.h125 #define CLK_PWM1 19 macro
H A Drockchip,rk3528-cru.h126 #define CLK_PWM1 114 macro
H A Drockchip,rk3576-cru.h182 #define CLK_PWM1 164 macro
H A Drockchip,rv1126-cru.h31 #define CLK_PWM1 17 macro
H A Drockchip,rk3588-cru.h91 #define CLK_PWM1 76 macro
H A Drk3568-cru.h410 #define CLK_PWM1 346 macro
/linux-6.15/arch/arm/boot/dts/intel/pxa/
H A Dpxa27x.dtsi60 clocks = <&clks CLK_PWM1>;
74 clocks = <&clks CLK_PWM1>;
H A Dpxa25x.dtsi78 clocks = <&clks CLK_PWM1>;
H A Dpxa3xx.dtsi236 clocks = <&clks CLK_PWM1>;
252 clocks = <&clks CLK_PWM1>;
/linux-6.15/Documentation/devicetree/bindings/pwm/
H A Dsprd,ums512-pwm.yaml57 <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
/linux-6.15/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi320 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
331 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
342 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
353 clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>;
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk356x-base.dtsi1561 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
1572 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
1583 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
1594 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
H A Drk3588-base.dtsi2452 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2463 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2474 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
2485 clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>;
/linux-6.15/drivers/clk/actions/
H A Dowl-s500.c497 [CLK_PWM1] = &pwm1_clk.common.hw,
H A Dowl-s700.c536 [CLK_PWM1] = &clk_pwm1.common.hw,
H A Dowl-s900.c664 [CLK_PWM1] = &pwm1_clk.common.hw,
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rv1126.c327 COMPOSITE(CLK_PWM1, "clk_pwm1", mux_xin24m_gpll_p, 0,
H A Dclk-rk3528.c488 COMPOSITE_NODIV(CLK_PWM1, "clk_pwm1", mux_100m_50m_24m_p, 0,
H A Dclk-rk3568.c1375 COMPOSITE_NODIV(CLK_PWM1, "clk_pwm1", gpll100_xin24m_cpll100_p, 0,

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