| /linux-6.15/arch/arm64/boot/dts/apple/ |
| H A D | t8015-common.dtsi | 5 * This file contains parts common to all Apple A11 devices.
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| H A D | t8015.dtsi | 3 * Apple T8015 "A11" SoC 379 /* Note that A11 doesn't actually have a hypervisor (EL2 is not implemented). */
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| H A D | t8015-pmgr.dtsi | 3 * PMGR Power domains for the Apple T8015 "A11" SoC
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| /linux-6.15/Documentation/devicetree/bindings/iommu/ |
| H A D | apple,sart.yaml | 19 SART1 has first been used since at least the A11 (iPhone 8 and iPhone X)
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| /linux-6.15/Documentation/admin-guide/device-mapper/ |
| H A D | dm-raid.rst | 146 A5 A6 A7 A8 A9 A9 A10 A11 A12 150 A6 A5 A9 A7 A8 A10 A9 A12 A11 164 A5 A6 A7 A8 A9 A9 A10 A11 A12 165 A6 A5 A9 A7 A8 A10 A9 A12 A11
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| /linux-6.15/Documentation/devicetree/bindings/arm/ |
| H A D | apple.yaml | 79 Devices based on the "A11" SoC: 255 - description: Apple A11 SoC based platforms
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| /linux-6.15/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | apple,aic.yaml | 35 from A11, system registers may also be used for "fast" IPIs. Starting from
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| /linux-6.15/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed-g4.c | 1399 #define A11 168 macro 1400 SIG_EXPR_LIST_DECL_SINGLE(A11, GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16)); 1401 SIG_EXPR_LIST_DECL_SINGLE(A11, RMII1CRSDV, RMII1, RMII1_DESC); 1402 SIG_EXPR_LIST_DECL_SINGLE(A11, RGMII1RXD2, RGMII1); 1403 PIN_DECL_(A11, SIG_EXPR_LIST_PTR(A11, GPIOV0), 1404 SIG_EXPR_LIST_PTR(A11, RMII1CRSDV), 1405 SIG_EXPR_LIST_PTR(A11, RGMII1RXD2)); 1457 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1459 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1910 ASPEED_PINCTRL_PIN(A11),
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| H A D | pinctrl-aspeed-g5.c | 955 #define A11 128 macro 956 SIG_EXPR_LIST_DECL_SINGLE(A11, SCL3, I2C3, I2C3_DESC); 957 PIN_DECL_1(A11, GPIOQ0, SCL3); 963 FUNC_GROUP_DECL(I2C3, A11, A10); 1904 ASPEED_PINCTRL_PIN(A11), 2481 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, A11, N20, SCU8C, 16), 2482 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, A11, N20, SCU8C, 16),
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| H A D | pinctrl-aspeed-g6.c | 637 #define A11 80 macro 638 SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16)); 639 PIN_DECL_1(A11, GPIOK0, SCL5); 645 FUNC_GROUP_DECL(I2C5, A11, C11); 1642 ASPEED_PINCTRL_PIN(A11),
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| /linux-6.15/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-libretech-cottonwood.dtsi | 258 * OUT: 32/A11
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| /linux-6.15/arch/arm64/boot/dts/ti/ |
| H A D | k3-am642-tqma64xxl-mbax4xxl.dts | 986 /* (A11) MCU_I2C1_SCL.MCU_GPIO0_20 */
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| /linux-6.15/arch/m68k/fpsp040/ |
| H A D | bindec.S | 77 | A11. Restore original FPCR; set size ext.
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| /linux-6.15/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a77970.c | 175 #define IP1_15_12 FM(DU_DG7) F_(0, 0) F_(0, 0) FM(A11) FM(IRQ1) F_(0, 0) F_(0, 0) F_(0, 0) F_(… 440 PINMUX_IPSR_GPSR(IP1_15_12, A11),
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| H A D | pfc-r8a77980.c | 209 #define IP1_15_12 FM(DU_DG7) FM(HRX0_A) F_(0, 0) FM(A11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F… 517 PINMUX_IPSR_GPSR(IP1_15_12, A11),
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| H A D | pfc-r8a77990.c | 99 #define GPSR1_11 F_(A11, IP4_11_8) 250 #define IP4_11_8 FM(A11) FM(SCL6_A) FM(TX3_B) FM(HTX4_C) F_(0, 0) FM(DU_VSYNC) FM(VI4_DATA1_B… 748 PINMUX_IPSR_GPSR(IP4_11_8, A11),
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| H A D | pfc-sh7734.c | 645 PINMUX_IPSR_GPSR(IP0_23_22, A11), 1386 GPIO_FN(A11), GPIO_FN(ST0_D7), GPIO_FN(LCD_DATA11_A),
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| H A D | pfc-r8a77965.c | 121 #define GPSR1_11 F_(A11, IP3_11_8) 285 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… 820 PINMUX_IPSR_GPSR(IP3_11_8, A11),
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| H A D | pfc-r8a7796.c | 121 #define GPSR1_11 F_(A11, IP3_11_8) 285 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… 818 PINMUX_IPSR_GPSR(IP3_11_8, A11),
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| H A D | pfc-r8a77951.c | 116 #define GPSR1_11 F_(A11, IP3_11_8) 282 #define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0)… 814 PINMUX_IPSR_GPSR(IP3_11_8, A11),
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| H A D | pfc-r8a779a0.c | 369 #define IP1SR1_15_12 FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR7) FM(A11) F_(0, 0) F_(0, 0… 837 PINMUX_IPSR_GPSR(IP1SR1_15_12, A11),
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| H A D | pfc-r8a7792.c | 384 PINMUX_SINGLE(A11),
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| H A D | pfc-sh7264.c | 1275 GPIO_FN(A11),
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| H A D | pfc-sh73a0.c | 46 PIN_NOGP(A11, "F26", fn)
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| H A D | pfc-sh7757.c | 1628 GPIO_FN(A11),
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