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Searched refs:subvector (Results 1 – 8 of 8) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrVecCompiler.td75 // A 128-bit subvector extract from the first 256-bit vector position is a
76 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
88 // A 128-bit subvector extract from the first 512-bit vector position is a
89 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
101 // A 128-bit subvector extract from the first 512-bit vector position is a
102 // subregister copy that needs no instruction. Likewise, a 128-bit subvector
H A DX86InstrFormats.td131 // The tuple (subvector) forms.
H A DX86InstrUtils.td284 // 8-bit compressed displacement tuple/subvector format. This is only
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVectorCombine.cpp136 Value *subvector(IRBuilderBase &Builder, Value *Val, unsigned Start,
1789 ChopOp.X.Val = HVC.subvector(Builder, X, V * ChopLen, ChopLen); in processFxpMul()
1790 ChopOp.Y.Val = HVC.subvector(Builder, Y, V * ChopLen, ChopLen); in processFxpMul()
2521 auto HexagonVectorCombine::subvector(IRBuilderBase &Builder, Value *Val, in subvector() function in HexagonVectorCombine
2532 return subvector(Builder, Val, 0, Len / 2); in sublo()
2539 return subvector(Builder, Val, Len / 2, Len / 2); in subhi()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td292 def SDTSubVecExtract : SDTypeProfile<1, 2, [// subvector extract
295 def SDTSubVecInsert : SDTypeProfile<1, 3, [ // subvector insert
752 // This operator does not do subvector type checking. The ARM
761 // This operator does subvector type checking.
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsics.td2502 //===---------- Intrinsics to perform subvector insertion/extraction ------===//
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td8278 // Multiply high patterns which multiply the lower subvector using smull/umull
8279 // and the upper subvector with smull2/umull2. Then shuffle the high the high
8954 // A 64-bit subvector insert to the first 128-bit vector position
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrNEON.td1096 // A 64-bit subvector insert to the first 128-bit vector position