| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 729 Result.setOpcode(Hexagon::SA1_addi); in deriveSubInst() 735 Result.setOpcode(Hexagon::SA1_addrx); in deriveSubInst() 746 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst() 751 Result.setOpcode(Hexagon::SA1_and1); in deriveSubInst() 950 Result.setOpcode(Hexagon::SA1_sxtb); in deriveSubInst() 955 Result.setOpcode(Hexagon::SA1_sxth); in deriveSubInst() 960 Result.setOpcode(Hexagon::SA1_tfr); in deriveSubInst() 975 Result.setOpcode(Hexagon::SA1_clrf); in deriveSubInst() 980 Result.setOpcode(Hexagon::SA1_clrt); in deriveSubInst() 998 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst() [all …]
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| H A D | HexagonMCCompound.cpp | 214 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 227 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 241 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 254 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 267 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 285 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 303 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 314 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn() 325 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonAsmPrinter.cpp | 248 T.setOpcode(Inst.getOpcode()); in ScaleVectorOffset() 277 Inst.setOpcode(Hexagon::A2_addi); in HexagonProcessInstruction() 291 Inst.setOpcode(Hexagon::A2_paddif); in HexagonProcessInstruction() 298 Inst.setOpcode(Hexagon::A2_paddit); in HexagonProcessInstruction() 319 Inst.setOpcode(Hexagon::A2_andir); in HexagonProcessInstruction() 366 MappedInst.setOpcode(Hexagon::C2_or); in HexagonProcessInstruction() 422 Inst.setOpcode(Hexagon::J2_call); in HexagonProcessInstruction() 497 TmpInst.setOpcode(Hexagon::A2_tfr); in HexagonProcessInstruction() 611 TmpInst.setOpcode(Hexagon::V6_vxor); in HexagonProcessInstruction() 749 MCB.setOpcode(Hexagon::BUNDLE); in emitInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 262 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail() 265 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail() 268 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail() 271 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail() 274 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail() 277 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail() 280 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail() 283 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail() 289 Inst.setOpcode(XCore::LD8U_3r); in Decode2OpInstructionFail() 310 Inst.setOpcode(XCore::LSS_3r); in Decode2OpInstructionFail() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 159 MCB.setOpcode(Hexagon::BUNDLE); in HexagonAsmParser() 536 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates() 1234 TmpInst.setOpcode(opCode); in makeCombineInst() 1341 Inst.setOpcode(Hexagon::A2_addi); in processInstruction() 1375 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction() 1410 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction() 1443 Inst.setOpcode(Hexagon::V6_vcombine); in processInstruction() 1685 Inst.setOpcode(Hexagon::M2_mpyi); in processInstruction() 1721 TmpInst.setOpcode(Hexagon::A2_tfr); in processInstruction() 1795 Inst.setOpcode(Hexagon::A2_addsph); in processInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 141 LabelInst.setOpcode(SPIRV::OpLabel); in emitOpLabel() 255 Inst.setOpcode(SPIRV::OpSourceExtension); in outputDebugSourceAndStrings() 261 Inst.setOpcode(SPIRV::OpSource); in outputDebugSourceAndStrings() 273 Inst.setOpcode(SPIRV::OpExtInstImport); in outputOpExtInstImports() 284 Inst.setOpcode(SPIRV::OpMemoryModel); in outputOpMemoryModel() 333 Inst.setOpcode(SPIRV::OpCapability); in outputGlobalRequirements() 341 Inst.setOpcode(SPIRV::OpExtension); in outputGlobalRequirements() 411 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionModeFromMDNode() 424 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionModeFromNumthreadsAttribute() 446 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionMode() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 283 Inst.setOpcode(AVR::RJMPk); in decodeFBRk() 286 Inst.setOpcode(AVR::RCALLk); in decodeFBRk() 319 Inst.setOpcode(It->second); in decodeCondBranch() 342 Inst.setOpcode(AVR::LDDRdPtrQ); in decodeLoadStore() 347 Inst.setOpcode(AVR::STDPtrQRr); in decodeLoadStore() 395 Inst.setOpcode(AVR::STPtrRr); in decodeLoadStore() 400 Inst.setOpcode(AVR::STPtrPiRr); in decodeLoadStore() 403 Inst.setOpcode(AVR::STPtrPdRr); in decodeLoadStore() 406 Inst.setOpcode(AVR::LDRdPtr); in decodeLoadStore() 411 Inst.setOpcode(AVR::LDRdPtrPi); in decodeLoadStore() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYAsmBackend.cpp | 302 Res.setOpcode(CSKY::LRW32); in relaxInstruction() 307 Res.setOpcode(CSKY::BR32); in relaxInstruction() 311 Res.setOpcode(CSKY::JSRI32); in relaxInstruction() 315 Res.setOpcode(CSKY::JMPI32); in relaxInstruction() 320 Res.setOpcode(Inst.getOpcode() == CSKY::JBT32 ? CSKY::JBT_E : CSKY::JBF_E); in relaxInstruction() 326 Res.setOpcode(CSKY::JBR32); in relaxInstruction() 339 Res.setOpcode(opcode); in relaxInstruction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 840 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction() 850 TmpInst.setOpcode(PPC::DCBTST); in ProcessInstruction() 873 TmpInst.setOpcode(PPC::DCBF); in ProcessInstruction() 882 TmpInst.setOpcode(PPC::LA); in ProcessInstruction() 911 TmpInst.setOpcode(PPC::ADDI); in ProcessInstruction() 920 TmpInst.setOpcode(PPC::PADDI); in ProcessInstruction() 929 TmpInst.setOpcode(PPC::ADDIS); in ProcessInstruction() 938 TmpInst.setOpcode(PPC::ADDIC); in ProcessInstruction() 947 TmpInst.setOpcode(PPC::ADDIC_rec); in ProcessInstruction() 1145 TmpInst.setOpcode(PPC::ADDPCIS); in ProcessInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 623 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch() 626 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch() 696 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch() 699 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch() 850 MI.setOpcode(Mips::BLEZC); in DecodeBlezlGroupBranch() 852 MI.setOpcode(Mips::BGEZC); in DecodeBlezlGroupBranch() 855 MI.setOpcode(Mips::BGEC); in DecodeBlezlGroupBranch() 898 MI.setOpcode(Mips::BLTC); in DecodeBgtzlGroupBranch() 936 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch() 1032 MI.setOpcode(Mips::DEXT); in DecodeDEXT() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86EncodingOptimization.cpp | 96 MI.setOpcode(NewOpc); in optimizeInstFromVEX3ToVEX2() 174 MI.setOpcode(NewOpc); in optimizeShiftRotateWithImmediateOne() 261 MI.setOpcode(NewOpc); in optimizeVPCMPWithImmediateOneOrSix() 284 MI.setOpcode(NewOpc); in optimizeMOVSX() 305 MI.setOpcode(NewOpc); in optimizeINCDEC() 365 MI.setOpcode(NewOpc); in optimizeMOV() 423 MI.setOpcode(NewOpc); in optimizeToFixedRegisterForm() 470 MI.setOpcode(NewOpc); in optimizeToShortImmediateForm()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 88 SICInst.setOpcode(VE::SIC); in emitSIC() 96 BSICInst.setOpcode(VE::BSICrii); in emitBSIC() 108 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi() 120 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi() 132 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii() 145 LEASLInst.setOpcode(VE::LEASLrri); in emitLEASLrri() 157 Inst.setOpcode(Opcode); in emitBinary()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2589 Inst.setOpcode(ARM::CPS3p); in DecodeCPSInstruction() 2594 Inst.setOpcode(ARM::CPS2p); in DecodeCPSInstruction() 2599 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction() 2604 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction() 2630 Inst.setOpcode(ARM::t2CPS3p); in DecodeT2CPSInstruction() 2635 Inst.setOpcode(ARM::t2CPS2p); in DecodeT2CPSInstruction() 2640 Inst.setOpcode(ARM::t2CPS1p); in DecodeT2CPSInstruction() 2648 Inst.setOpcode(ARM::t2HINT); in DecodeT2CPSInstruction() 2672 Inst.setOpcode(Opcode); in DecodeT2HintSpaceInstruction() 2807 Inst.setOpcode(ARM::SETPAN); in DecodeSETPANInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 1407 MI.setOpcode(Opcode); in LowerFAULTING_OP() 1436 MOVI.setOpcode(AArch64::MOVID); in emitFMov0() 1608 TmpInst.setOpcode(AArch64::BR); in emitInstruction() 1617 TmpInst.setOpcode(AArch64::B); in emitInstruction() 1637 TmpInstSB.setOpcode(AArch64::SB); in emitInstruction() 1659 Adrp.setOpcode(AArch64::ADRP); in emitInstruction() 1699 Blr.setOpcode(AArch64::BLR); in emitInstruction() 1907 Adrp.setOpcode(AArch64::ADRP); in emitMachOIFuncStubBody() 1920 Ldr.setOpcode(AArch64::LDRXui); in emitMachOIFuncStubBody() 2020 Adrp.setOpcode(AArch64::ADRP); in emitMachOIFuncStubHelperBody() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 304 ITInst.setOpcode(ARM::t2IT); in flushPendingInstructions() 8738 TmpInst.setOpcode(Opcode); in processInstruction() 8776 TmpInst.setOpcode(Opcode); in processInstruction() 8794 TmpInst.setOpcode(ARM::ADR); in processInstruction() 10193 TmpInst.setOpcode(NewOpc); in processInstruction() 10228 TmpInst.setOpcode(newOpc); in processInstruction() 10281 TmpInst.setOpcode(newOpc); in processInstruction() 10343 TmpInst.setOpcode(Opc); in processInstruction() 10579 Inst.setOpcode(ARM::t2B); in processInstruction() 10586 Inst.setOpcode(ARM::tB); in processInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 182 MI.setOpcode(Hexagon::BUNDLE); in getInstruction() 214 MI.setOpcode(Hexagon::S6_allocframe_to_raw); in remapInstruction() 222 MI.setOpcode(L6_deallocframe_map_to_raw); in remapInstruction() 230 MI.setOpcode(L6_return_map_to_raw); in remapInstruction() 238 MI.setOpcode(L4_return_map_to_raw_t); in remapInstruction() 246 MI.setOpcode(L4_return_map_to_raw_f); in remapInstruction() 254 MI.setOpcode(L4_return_map_to_raw_tnew_pt); in remapInstruction() 262 MI.setOpcode(L4_return_map_to_raw_fnew_pt); in remapInstruction() 270 MI.setOpcode(L4_return_map_to_raw_tnew_pnt); in remapInstruction() 278 MI.setOpcode(L4_return_map_to_raw_fnew_pnt); in remapInstruction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 119 TmpInst0.setOpcode(Mips::JALR64); in emitPseudoIndirectBranch() 124 TmpInst0.setOpcode(Mips::JRC16_MMR6); in emitPseudoIndirectBranch() 126 TmpInst0.setOpcode(Mips::JALR); in emitPseudoIndirectBranch() 131 TmpInst0.setOpcode(Mips::JR_MM); in emitPseudoIndirectBranch() 134 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch() 821 I.setOpcode(Mips::JAL); in EmitJal() 830 I.setOpcode(Opcode); in EmitInstrReg() 849 I.setOpcode(Opcode); in EmitInstrRegReg() 859 I.setOpcode(Opcode); in EmitInstrRegRegReg()
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| H A D | MipsMCInstLower.cpp | 215 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi() 253 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu() 318 OutMI.setOpcode(MI->getOpcode()); in Lower()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 178 TmpInst.setOpcode(Opcode); in emitR() 187 TmpInst.setOpcode(Opcode); in emitRX() 207 TmpInst.setOpcode(Opcode); in emitII() 218 TmpInst.setOpcode(Opcode); in emitRRX() 236 TmpInst.setOpcode(Opcode); in emitRRRX() 256 TmpInst.setOpcode(Opcode); in emitRRIII() 1176 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad() 1188 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad() 1201 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad() 1310 Inst.setOpcode(Mips::OR); in emitDirectiveCpreturn() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 37 NopInst.setOpcode(ARM::HINT); in getNop() 42 NopInst.setOpcode(ARM::MOVr); in getNop()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kMCInstLower.cpp | 162 OutMI.setOpcode(Opcode); in Lower() 183 OutMI.setOpcode(Opcode); in Lower()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 110 CallInst.setOpcode(SP::CALL); in EmitCall() 118 RDPCInst.setOpcode(SP::RDASR); in EmitRDPC() 129 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI() 140 Inst.setOpcode(Opcode); in EmitBinary()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstBuilder.h | 27 Inst.setOpcode(Opcode); in MCInstBuilder()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMCInstLower.cpp | 48 OutMI.setOpcode(MI->getOpcode()); in Lower()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 397 OutMI.setOpcode(MI->getOpcode()); in Lower() 437 OutMI.setOpcode(NewOpc); in Lower() 454 OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget())); in Lower() 460 OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget())); in Lower() 468 OutMI.setOpcode(getRetOpcode(Subtarget)); in Lower() 480 OutMI.setOpcode(convertTailJumpOpcode(OutMI.getOpcode())); in Lower() 485 OutMI.setOpcode(convertTailJumpOpcode(OutMI.getOpcode())); in Lower() 805 CallInst.setOpcode(CallOpcode); in LowerSTATEPOINT() 840 MI.setOpcode(Opcode); in LowerFAULTING_OP() 1332 Ret.setOpcode(OpCode); in LowerPATCHABLE_RET() [all …]
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