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Searched refs:is128BitVector (Results 1 – 20 of 20) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h196 bool is128BitVector() const { in is128BitVector() function
197 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
H A DMachineValueType.h152 bool is128BitVector() const { in is128BitVector() function
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp80 if (VT.is128BitVector() || VT.is256BitVector()) { in INITIALIZE_PASS()
96 bool Is128Vec = BVN->getValueType(0).is128BitVector(); in INITIALIZE_PASS()
H A DLoongArchISelLowering.cpp458 bool Is128Vec = ResTy.is128BitVector(); in lowerBUILD_VECTOR()
3642 else if (ValVT.is128BitVector()) in CC_LoongArch()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h151 if (LocVT == MVT::f128 || LocVT.is128BitVector()) { in CC_XPLINK64_Shadow_Reg()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp47 else if (LocVT.is128BitVector() || (LocVT == MVT::f128)) { in CC_PPC64_ELF_Shadow_GPR_Regs()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp141 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
H A DAArch64ISelLowering.cpp4461 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
4515 assert(VT.is128BitVector() && "Unexpected vector MULL size"); in skipExtensionForVectorMULL()
6730 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
11125 assert((SrcVT.is64BitVector() || SrcVT.is128BitVector()) && in ReconstructShuffle()
12001 if (!Extract.getOperand(0).getValueType().is128BitVector()) in constructDup()
12022 V.getOperand(0).getValueType().is128BitVector()) { in constructDup()
13752 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
17867 if (!VT.is64BitVector() && !VT.is128BitVector()) in performANDCombine()
18878 if (!VT.is128BitVector()) { in performAddSubLongCombine()
21113 if (!VT.is128BitVector() && !VT.is64BitVector()) in performPostLD1Combine()
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H A DAArch64FastISel.cpp2944 VT.is128BitVector()) in fastLowerArguments()
2990 } else if (VT.is128BitVector()) { in fastLowerArguments()
H A DAArch64ISelDAGToDAG.cpp172 if (!VT.is64BitVector() || !LVT.is128BitVector() || in SelectExtractHigh()
1527 } else if (VT.is128BitVector()) { in tryIndexedLoad()
H A DAArch64TargetTransformInfo.cpp3173 LT.second.is128BitVector() && (!Alignment || *Alignment < Align(16))) { in getMemoryOpCost()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6534 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
11338 assert(VT.is128BitVector() && in lowerShuffleAsByteRotate()
12161 if (!VT.is128BitVector()) in lowerShuffleAsElementInsertion()
12302 assert((VT.is128BitVector() && in lowerShuffleOfExtractsAsVperm()
17611 if (VT.is128BitVector()) in lowerVECTOR_SHUFFLE()
18278 if (!OpVT.is128BitVector()) { in LowerSCALAR_TO_VECTOR()
24284 assert(VT.is128BitVector() && InVT.is128BitVector() && "Unexpected VTs"); in LowerEXTEND_VECTOR_INREG()
31050 assert(VT.is128BitVector() && in LowerBITREVERSE_XOP()
37385 if (MaskVT.is128BitVector()) { in matchBinaryShuffle()
47403 if (VT.is128BitVector()) { in combineVectorPack()
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H A DX86ISelDAGToDAG.cpp599 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in INITIALIZE_PASS()
1049 !(VT.is128BitVector() || VT.is256BitVector())) in PreprocessISelDAG()
4534 if (NVT.is128BitVector()) in matchVPTERNLOG()
4544 if (NVT.is128BitVector()) in matchVPTERNLOG()
4564 if (NVT.is128BitVector()) in matchVPTERNLOG()
4899 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
4900 unsigned SubReg = CmpVT.is128BitVector() ? X86::sub_xmm : X86::sub_ymm; in tryVPTESTM()
5224 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || in Select()
H A DX86ISelLoweringCall.cpp1751 else if (RegVT.is128BitVector()) in LowerFormalArguments()
2167 else if (RegVT.is128BitVector()) { in LowerCall()
H A DX86TargetTransformInfo.cpp3094 !((ST->hasXOP() && (!ST->hasAVX2() || MTy.is128BitVector())) || in getCmpSelInstrCost()
4156 if (!(MTy.is128BitVector() || (ST->hasAVX2() && MTy.is256BitVector()) || in getIntrinsicInstrCost()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp874 assert(Node->getValueType(0).is128BitVector()); in trySelect()
1093 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
H A DMipsSEISelLowering.cpp597 if (!Ty.is128BitVector()) in performORCombine()
994 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2404 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2456 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2976 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2288 assert(VecType.is128BitVector() && "Unexpected shuffle vector type"); in LowerVECTOR_SHUFFLE()
2476 if (!SrcType.is128BitVector() || in performVECTOR_SHUFFLECombine()
2742 if (SrcVT.is256BitVector() && DstVT.is128BitVector()) { in truncateVectorWithNARROW()
2776 (OutSVT == MVT::i8 || OutSVT == MVT::i16) && OutVT.is128BitVector())) in performTruncateCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6297 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
6981 bool is128Bits = VectorVT.is128BitVector(); in isVMOVModifiedImm()
8408 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
9216 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
9498 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
9613 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
10383 if (VT.is128BitVector()) { in LowerVecReduceMinMax()
12674 !N0.getValueType().is128BitVector()) in AddCombineVUZPToVPADDL()
14224 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
14768 EVT CanonicalVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in PerformORCombine()
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H A DARMISelDAGToDAG.cpp3617 assert((VT.is64BitVector() || VT.is128BitVector()) && in getVectorShuffleOpcode()