Searched refs:getZeroVector (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6377 V = getZeroVector(VT, Subtarget, DAG, dl); in LowerBuildVectorAsInsert()
8692 return getZeroVector(VT, Subtarget, DAG, dl); in LowerBUILD_VECTOR()
10526 V1 = getZeroVector(VT, Subtarget, DAG, DL); in lowerShuffleAsBlend()
10528 V2 = getZeroVector(VT, Subtarget, DAG, DL); in lowerShuffleAsBlend()
15564 V1 = getZeroVector(VT, Subtarget, DAG, DL); in lowerShuffleWithSHUFPD()
15566 V2 = getZeroVector(VT, Subtarget, DAG, DL); in lowerShuffleWithSHUFPD()
17537 return getZeroVector(VT, Subtarget, DAG, DL); in lowerVECTOR_SHUFFLE()
18274 return getZeroVector(OpVT, Subtarget, DAG, dl); in LowerSCALAR_TO_VECTOR()
31719 PassThru = getZeroVector(VT, Subtarget, DAG, dl); in LowerMGATHER()
54641 return getZeroVector(VT, Subtarget, DAG, DL); in combineConcatVectorOps()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6293 static SDValue getZeroVector(EVT VT, SelectionDAG &DAG, const SDLoc &dl) { in getZeroVector() function
6509 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
6680 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
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