Searched refs:getMaxNumVGPRs (Results 1 – 10 of 10) sorted by relevance
1385 unsigned getMaxNumVGPRs(unsigned WavesPerEU) const { in getMaxNumVGPRs() function1386 return AMDGPU::IsaInfo::getMaxNumVGPRs(this, WavesPerEU); in getMaxNumVGPRs()1401 unsigned getMaxNumVGPRs(const Function &F) const;1404 return getMaxNumVGPRs(F); in getMaxNumAGPRs()1415 unsigned getMaxNumVGPRs(const MachineFunction &MF) const;
250 MaxNumVGPRs = ST->getMaxNumVGPRs(MF); in runOnMachineFunction()251 MaxNumVGPRs = std::min(ST->getMaxNumVGPRs(MFI->getOccupancy()), MaxNumVGPRs); in runOnMachineFunction()
816 unsigned MaxNumVGPRs = getMaxNumVGPRs(WavesPerEU.first); in getBaseMaxNumVGPRs()829 if (Requested && Requested > getMaxNumVGPRs(WavesPerEU.first)) in getBaseMaxNumVGPRs()842 unsigned GCNSubtarget::getMaxNumVGPRs(const Function &F) const { in getMaxNumVGPRs() function in GCNSubtarget846 unsigned GCNSubtarget::getMaxNumVGPRs(const MachineFunction &MF) const { in getMaxNumVGPRs() function in GCNSubtarget
105 ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() && in SIMachineFunctionInfo()170 AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1); in SIMachineFunctionInfo()
92 std::min(ST.getMaxNumVGPRs(TargetOccupancy), VGPRExcessLimit); in initialize()974 unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF); in checkScheduling()
671 unsigned MaxNumVGPRs = ST.getMaxNumVGPRs(MF); in getReservedRegs()3049 return std::min(ST.getMaxNumVGPRs(Occupancy), ST.getMaxNumVGPRs(MF)); in getRegPressureLimit()
168 unsigned MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in getMaxVGPRs()
3068 unsigned MaxNumVGPRs = Subtarget->getMaxNumVGPRs(MF); in CanLowerReturn()
293 unsigned getMaxNumVGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU);
1117 unsigned getMaxNumVGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU) { in getMaxNumVGPRs() function