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Searched refs:fixed_vector (Results 1 – 25 of 28) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp72 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
73 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
75 const LLT v8s64 = LLT::fixed_vector(8, 64); in SPIRVLegalizerInfo()
78 const LLT v8s8 = LLT::fixed_vector(8, 8); in SPIRVLegalizerInfo()
79 const LLT v8s1 = LLT::fixed_vector(8, 1); in SPIRVLegalizerInfo()
84 const LLT v4s8 = LLT::fixed_vector(4, 8); in SPIRVLegalizerInfo()
85 const LLT v4s1 = LLT::fixed_vector(4, 1); in SPIRVLegalizerInfo()
90 const LLT v3s8 = LLT::fixed_vector(3, 8); in SPIRVLegalizerInfo()
91 const LLT v3s1 = LLT::fixed_vector(3, 1); in SPIRVLegalizerInfo()
96 const LLT v2s8 = LLT::fixed_vector(2, 8); in SPIRVLegalizerInfo()
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H A DSPIRVBuiltins.cpp968 LLT::fixed_vector(3, PointerSize)); in genWorkgroupQuery()
1043 LLT::fixed_vector(Call->ReturnType->getOperand(2).getImm(), BitWidth); in generateBuiltinVar()
1144 LLT::fixed_vector(NumActualRetComponents, 32)); in generateImageSizeQueryInst()
H A DSPIRVPreLegalizer.cpp360 NewT = LLT::fixed_vector(2, NewT); in createNewIdReg()
H A DSPIRVGlobalRegistry.cpp358 LLT LLTy = EmitIR ? LLT::fixed_vector(ElemCnt, BitWidth) : LLT::scalar(32); in getOrCreateIntCompositeOrNull()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp6184 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
6208 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
6232 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
6256 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
6268 if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8)) in selectIntrinsicWithSideEffects()
6298 else if (Ty == LLT::fixed_vector(2, S64) || Ty == LLT::fixed_vector(2, P0)) in selectIntrinsicWithSideEffects()
6334 if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8)) in selectIntrinsicWithSideEffects()
6400 if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8)) in selectIntrinsicWithSideEffects()
6586 if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8)) in selectIntrinsicWithSideEffects()
6604 if (Ty == LLT::fixed_vector(8, S8) || Ty == LLT::fixed_vector(16, S8)) in selectIntrinsicWithSideEffects()
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H A DAArch64PreLegalizerCombiner.cpp320 MidTy = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
323 MidTy = LLT::fixed_vector(2, 32); in applyExtAddvToUdotAddv()
343 LLT MainTy = LLT::fixed_vector(16, 8); in applyExtAddvToUdotAddv()
361 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
366 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
386 ZeroesLLT = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
389 ZeroesLLT = LLT::fixed_vector(2, 32); in applyExtAddvToUdotAddv()
472 MainTy = LLT::fixed_vector(16, 8); in applyExtUaddvToUaddlv()
474 MainTy = LLT::fixed_vector(8, 16); in applyExtUaddvToUaddlv()
476 MainTy = LLT::fixed_vector(4, 32); in applyExtUaddvToUaddlv()
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H A DAArch64LegalizerInfo.cpp52 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
53 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
54 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
55 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
56 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
57 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
58 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
61 const LLT v2p0 = LLT::fixed_vector(2, p0); in AArch64LegalizerInfo()
1482 MidTy = LLT::fixed_vector(4, 32); in legalizeIntrinsic()
1485 MidTy = LLT::fixed_vector(2, 64); in legalizeIntrinsic()
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H A DAArch64PostLegalizerLowering.cpp1158 else if (DstTy == LLT::fixed_vector(2, 64)) { in matchExtMulToMULL()
1193 else if (DstTy == LLT::fixed_vector(2, 64)) { in applyExtMulToMULL()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86LegalizerInfo.cpp52 const LLT v2s32 = LLT::fixed_vector(2, 32); in X86LegalizerInfo()
53 const LLT v4s8 = LLT::fixed_vector(4, 8); in X86LegalizerInfo()
56 const LLT v16s8 = LLT::fixed_vector(16, 8); in X86LegalizerInfo()
57 const LLT v8s16 = LLT::fixed_vector(8, 16); in X86LegalizerInfo()
58 const LLT v4s32 = LLT::fixed_vector(4, 32); in X86LegalizerInfo()
59 const LLT v2s64 = LLT::fixed_vector(2, 64); in X86LegalizerInfo()
60 const LLT v2p0 = LLT::fixed_vector(2, p0); in X86LegalizerInfo()
62 const LLT v32s8 = LLT::fixed_vector(32, 8); in X86LegalizerInfo()
64 const LLT v8s32 = LLT::fixed_vector(8, 32); in X86LegalizerInfo()
65 const LLT v4s64 = LLT::fixed_vector(4, 64); in X86LegalizerInfo()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCLegalizerInfo.cpp49 const LLT V16S8 = LLT::fixed_vector(16, 8); in PPCLegalizerInfo()
50 const LLT V8S16 = LLT::fixed_vector(8, 16); in PPCLegalizerInfo()
51 const LLT V4S32 = LLT::fixed_vector(4, 32); in PPCLegalizerInfo()
52 const LLT V2S64 = LLT::fixed_vector(2, 64); in PPCLegalizerInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp591 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
592 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
593 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
595 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
596 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
597 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
598 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
599 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
600 const LLT V7S32 = LLT::fixed_vector(7, 32); in AMDGPULegalizerInfo()
601 const LLT V8S32 = LLT::fixed_vector(8, 32); in AMDGPULegalizerInfo()
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H A DAMDGPUGlobalISelUtils.cpp77 if (Ty == LLT::fixed_vector(2, 16) || Ty == LLT::scalar(64)) in hasAtomicFaddRtnForTy()
H A DAMDGPUArgumentUsageInfo.cpp96 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp193 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1051 return LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in widen96To128()
1778 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
2094 LLT MergeTy = LLT::fixed_vector(Ops.size(), EltTy); in foldInsertEltToCmpSelect()
2487 if (DstTy != LLT::scalar(16) && DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2862 LLT Vec32 = LLT::fixed_vector(2 * SrcTy.getNumElements(), 32); in applyMappingImpl()
2977 LLT Vec32 = LLT::fixed_vector(2 * VecTy.getNumElements(), 32); in applyMappingImpl()
4105 if (DstTy == LLT::fixed_vector(2, 16)) { in getInstrMapping()
H A DAMDGPUInstructionSelector.cpp645 if (MRI->getType(Dst) != LLT::fixed_vector(2, 16) || in selectG_BUILD_VECTOR()
2283 if (DstTy == LLT::fixed_vector(2, 16) && SrcTy == LLT::fixed_vector(2, 32)) { in selectG_TRUNC()
3883 MRI.getType(Src) == LLT::fixed_vector(2, 16)) { in selectVOP3PModsImpl()
5413 LLT::fixed_vector(2, 16)); in isExtractHiElt()
H A DAMDGPUCallLowering.cpp1163 auto ScratchRSrcReg = MIRBuilder.buildCopy(LLT::fixed_vector(4, 32), in handleImplicitCallArguments()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLowLevelType.h92 static constexpr LLT fixed_vector(unsigned NumElements, in fixed_vector() function
99 static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
250 return fixed_vector(Factor, *this); in multiplyElements()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp76 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
77 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
78 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
79 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp104 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
H A DLegacyLegalizerInfo.cpp348 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
362 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DUtils.cpp524 LLT::fixed_vector(LeftoverNumElts, RegTy.getScalarSizeInBits()); in extractParts()
592 LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy); in extractVectorParts()
619 LLT LeftoverTy = LLT::fixed_vector(LeftoverNumElts, EltTy); in extractVectorParts()
1100 return LLT::fixed_vector(LCMSize / OrigElt.getSizeInBits(), OrigElt); in getLCMType()
1105 return LLT::fixed_vector(LCMSize / OrigSize, OrigTy); in getLCMType()
1163 return LLT::fixed_vector(GCD / OrigElt.getSizeInBits(), OrigElt); in getGCDType()
H A DCallLowering.cpp482 LLT BVType = LLT::fixed_vector(NumElts, PartLLT); in buildCopyFromRegs()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h967 LLT NewTy = LLT::fixed_vector(NumElts, LLT::scalar(MinSize)); in widenVectorEltsToVectorMinSize()
1135 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMinNumElements()
1154 TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType())); in alignNumElementsTo()
H A DLegalizationArtifactCombiner.h662 LLT NewBVTy = LLT::fixed_vector(NumSrcsUsed, SrcTy); in findValueFromBuildVector()

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