| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 92 unsigned SplatBitSize; in INITIALIZE_PASS() local 101 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in INITIALIZE_PASS() 105 switch (SplatBitSize) { in INITIALIZE_PASS() 335 unsigned SplatBitSize; in selectVSplat() local 338 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVSplat()
|
| H A D | LoongArchISelLowering.cpp | 456 unsigned SplatBitSize; in lowerBUILD_VECTOR() local 465 if (Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in lowerBUILD_VECTOR() 467 SplatBitSize <= 64) { in lowerBUILD_VECTOR() 469 if (SplatBitSize != 8 && SplatBitSize != 16 && SplatBitSize != 32 && in lowerBUILD_VECTOR() 470 SplatBitSize != 64) in lowerBUILD_VECTOR() 475 switch (SplatBitSize) { in lowerBUILD_VECTOR()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 522 unsigned SplatBitSize; in selectVSplat() local 525 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVSplat() 1087 unsigned SplatBitSize; in trySelect() local 1096 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in trySelect() 1101 switch (SplatBitSize) { in trySelect() 1134 ((ABI.IsO32() && SplatBitSize < 64) || in trySelect() 1141 bool Is32BitSplat = ABI.IsO32() || SplatBitSize < 64; in trySelect() 1148 SplatBitSize == 16 in trySelect() 1150 : (SplatBitSize == 32 ? Mips::FILL_W in trySelect() 1163 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 32) { in trySelect() [all …]
|
| H A D | MipsISelDAGToDAG.cpp | 240 unsigned SplatBitSize; in selectVecAddAsVecSubIfProfitable() local 243 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVecAddAsVecSubIfProfitable()
|
| H A D | MipsSEISelLowering.cpp | 533 unsigned SplatBitSize; in isVSplat() local 558 unsigned SplatBitSize; in isVectorAllOnes() local 842 unsigned SplatBitSize; in performDSPShiftCombine() local 851 !BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in performDSPShiftCombine() 853 (SplatBitSize != EltSize) || in performDSPShiftCombine() 2453 unsigned SplatBitSize; in lowerBUILD_VECTOR() local 2459 if (Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in lowerBUILD_VECTOR() 2461 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR() 2463 if (SplatBitSize != 8 && SplatBitSize != 16 && SplatBitSize != 32 && in lowerBUILD_VECTOR() 2464 SplatBitSize != 64) in lowerBUILD_VECTOR() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6599 unsigned SplatBitSize; in getVShiftImm() local 6989 SplatBitSize = 32; in isVMOVModifiedImm() 6991 switch (SplatBitSize) { in isVMOVModifiedImm() 7912 unsigned SplatBitSize; in LowerBUILD_VECTOR() local 7921 (SplatBitSize == 8 || SplatBitSize == 16 || SplatBitSize == 32) && in LowerBUILD_VECTOR() 7967 (SplatBitSize == 8 || SplatBitSize == 16 || SplatBitSize == 32)) { in LowerBUILD_VECTOR() 14413 unsigned SplatBitSize; in PerformANDCombine() local 14417 if (SplatBitSize == 8 || SplatBitSize == 16 || SplatBitSize == 32 || in PerformANDCombine() 14709 unsigned SplatBitSize; in PerformORCombine() local 14713 if (SplatBitSize == 8 || SplatBitSize == 16 || SplatBitSize == 32 || in PerformORCombine() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 816 if (SplatBitSize > 64) in isVectorConstantLegal() 821 int64_t SignedValue = SignExtend64(Value, SplatBitSize); in isVectorConstantLegal() 825 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal() 826 SystemZ::VectorBits / SplatBitSize); in isVectorConstantLegal() 831 if (TII->isRxSBGMask(Value, SplatBitSize, Start, End)) { in isVectorConstantLegal() 835 OpVals.push_back(Start - (64 - SplatBitSize)); in isVectorConstantLegal() 836 OpVals.push_back(End - (64 - SplatBitSize)); in isVectorConstantLegal() 838 VecVT = MVT::getVectorVT(MVT::getIntegerVT(SplatBitSize), in isVectorConstantLegal() 889 SplatBitSize = Width; in SystemZVectorConstantInfo() 6013 unsigned SplatBitSize; in lowerShift() local [all …]
|
| H A D | SystemZISelLowering.h | 804 unsigned SplatBitSize = 0; member
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9329 unsigned SplatBitSize; in LowerBUILD_VECTOR() local 9339 if (BVNIsConstantSplat && (SplatBitSize == 64) && in LowerBUILD_VECTOR() 9378 if (!BVNIsConstantSplat || SplatBitSize > 32) { in LowerBUILD_VECTOR() 9466 unsigned SplatSize = SplatBitSize / 8; in LowerBUILD_VECTOR() 9500 (32-SplatBitSize)); in LowerBUILD_VECTOR() 9558 unsigned TypeShiftAmt = i & (SplatBitSize-1); in LowerBUILD_VECTOR() 9942 unsigned SplatBitSize; in lowerToXXSPLTI32DX() local 9946 SplatBitSize > 32) in lowerToXXSPLTI32DX() 9972 for (; SplatBitSize < 32; SplatBitSize <<= 1) in lowerToXXSPLTI32DX() 9973 SplatVal |= (SplatVal << SplatBitSize); in lowerToXXSPLTI32DX() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2576 unsigned SplatBitSize; in performVectorTruncZeroCombine() local 2581 Splat->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in performVectorTruncZeroCombine()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12443 unsigned SplatBitSize; in resolveBuildVector() local 12446 unsigned NumSplats = VT.getSizeInBits() / SplatBitSize; in resolveBuildVector() 12449 CnstBits <<= SplatBitSize; in resolveBuildVector() 12450 UndefBits <<= SplatBitSize; in resolveBuildVector() 13790 unsigned SplatBitSize; in getVShiftImm() local 13792 if (!BVN || !BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, in getVShiftImm() 13794 SplatBitSize > ElementBits) in getVShiftImm() 13914 unsigned SplatBitSize = 0; in EmitVectorComparison() local 19608 unsigned SplatBitSize; in tryCombineShiftImm() local 19610 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in tryCombineShiftImm() [all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 2042 unsigned &SplatBitSize, bool &HasAnyUndefs,
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 162 unsigned SplatBitSize; in isConstantSplatVector() local 170 return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs, in isConstantSplatVector() 172 EltSize == SplatBitSize; in isConstantSplatVector() 12396 unsigned &SplatBitSize, in isConstantSplat() argument 12467 SplatBitSize = VecWidth; in isConstantSplat()
|
| H A D | DAGCombiner.cpp | 7110 unsigned SplatBitSize; in visitAND() local 7119 Vector->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in visitAND() 7124 if (IsSplat && (SplatBitSize % EltBitWidth) == 0) { in visitAND() 7134 for (unsigned i = 0, n = (SplatBitSize / EltBitWidth); i < n; ++i) in visitAND()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4143 unsigned SplatBitSize; in getAVX512Node() local 7090 if (ScalarSize == SplatBitSize) in getConstantVector() 7093 unsigned NumElm = SplatBitSize / ScalarSize; in getConstantVector() 7199 unsigned SplatBitSize; in lowerBuildVectorAsBroadcast() local 7203 SplatBitSize > VT.getScalarSizeInBits() && in lowerBuildVectorAsBroadcast() 7204 SplatBitSize < VT.getSizeInBits()) { in lowerBuildVectorAsBroadcast() 7213 if (SplatBitSize == 32 || SplatBitSize == 64 || in lowerBuildVectorAsBroadcast() 7214 (SplatBitSize < 32 && Subtarget.hasAVX2())) { in lowerBuildVectorAsBroadcast() 7216 MVT CVT = MVT::getIntegerVT(SplatBitSize); in lowerBuildVectorAsBroadcast() 7219 unsigned Repeat = VT.getSizeInBits() / SplatBitSize; in lowerBuildVectorAsBroadcast() [all …]
|