| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfoF2.td | 383 defm : BRCond_Bin_SWAP_F2<SETOGT, "f2FCMPLT", BT32, BF32, MVC32>; 414 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)), bb:$imm16), 416 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)), 418 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)), FPR32Op:$rx, FPR32Op:$false),
|
| H A D | CSKYInstrInfoF1.td | 363 defm : BRCond_Bin_SWAP<SETOGT, "FCMPLT", BT32, BF32, MVC32>; 388 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETOGT)), bb:$imm16), 390 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETOGT)),
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1510 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 240 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode() 264 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.h | 113 case ISD::SETOGT: in fpCondCode2Fcc()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrFloat.td | 89 defm GT : ComparisonFP<SETOGT, "gt ", 0x5e, 0x64>;
|
| H A D | WebAssemblyInstrSIMD.td | 727 defm GT : SIMDConditionFP<"gt", SETOGT, 68>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFloat32InstrInfo.td | 188 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
|
| H A D | LoongArchFloat64InstrInfo.td | 168 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
|
| H A D | LoongArchISelLowering.cpp | 165 ISD::SETOGT, ISD::SETOGE, ISD::SETUGT, ISD::SETUGE, in LoongArchTargetLowering() 278 setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT, in LoongArchTargetLowering() 324 setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT, in LoongArchTargetLowering()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 468 case ISD::SETOGT: return "setogt"; in getOperationName()
|
| H A D | TargetLowering.cpp | 349 case ISD::SETOGT: in softenSetCCOperands() 5164 case ISD::SETONE: NewCond = IsNegInf ? ISD::SETOGT : ISD::SETOLT; break; in SimplifySetCC() 10798 SDValue OGT = DAG.getSetCC(dl, SetCCVT, Src, MaxFloatNode, ISD::SETOGT); in expandFP_TO_INT_SAT() 10959 (TLI.isCondCodeLegal(ISD::SETOGT, OpVT) || in LegalizeSetCCCondCode() 10961 CC1 = ISD::SETOGT; in LegalizeSetCCCondCode() 10969 case ISD::SETOGT: in LegalizeSetCCCondCode()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4247 case ISD::SETOGT: in SelectCC() 4274 case ISD::SETOGT: in SelectCC() 4320 case ISD::SETOGT: in getPredicateForSetCC() 4343 case ISD::SETOGT: in getCRIdxForSetCC() 4381 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst() 4390 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst() 4404 case ISD::SETOGT: in getVCmpInst()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructions.td | 362 def COND_OGT : PatFrags<(ops), [(OtherVT SETOGT), (OtherVT SETGT)]>;
|
| H A D | SIWholeQuadMode.cpp | 855 case ISD::SETOGT: in lowerKillF32()
|
| H A D | AMDGPUISelLowering.cpp | 1607 case ISD::SETOGT: { in combineFMinMaxLegacyImpl() 2339 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL() 2432 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFROUNDEVEN() 3058 DAG.getSetCC(SL, SetCCVT, X, OverflowCheckConst, ISD::SETOGT); in lowerFEXP()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 256 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering() 261 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering() 393 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
|
| H A D | MipsMSAInstrInfo.td | 130 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 131 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 858 case ISD::SETOGT: in IntCondCCodeToICC()
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 792 def SETOGT : CondCode<"FCMP_OGT">; 1424 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3202 case ISD::SETOGT: in getVectorComparison() 3322 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC() 3339 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC() 3341 SDValue GT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2577 ISD::SETOGT); in LowerFROUND32() 2620 ISD::SETOGT); in LowerFROUND64()
|
| H A D | NVPTXISelDAGToDAG.cpp | 561 case ISD::SETOGT: in getPTXCmpMode()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SVEInstrInfo.td | 2000 defm FCMGT_PPzZZ : sve_fp_3op_p_pd_cc<0b001, "fcmgt", SETOGT, SETGT, SETOLT, SETLT>; 2008 defm FCMGT_PPzZ0 : sve_fp_2op_p_pd<0b001, "fcmgt", SETOGT, SETGT, SETOLT, SETLT>; 2009 defm FCMLT_PPzZ0 : sve_fp_2op_p_pd<0b010, "fcmlt", SETOLT, SETLT, SETOGT, SETGT>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1808 case ISD::SETOGT: in TranslateM68kCC()
|