Searched refs:PredState (Results 1 – 3 of 3) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86WinEHState.cpp | 561 int PredState = PredEndState->second; in getPredState() local
562 assert(PredState != OverdefinedState && in getPredState()
565 CommonState = PredState; in getPredState()
569 if (CommonState != PredState) in getPredState()
695 int PredState = getPredState(FinalStates, F, ParentBaseState, BB); in addStateStores() local
696 if (PredState == OverdefinedState) in addStateStores()
701 InitialStates.insert({BB, PredState}); in addStateStores()
702 FinalStates.insert({BB, PredState}); in addStateStores()
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| H A D | X86SpeculativeLoadHardening.cpp | 150 struct PredState { struct in __anon2122edec0111::X86SpeculativeLoadHardeningPass
157 PredState(MachineFunction &MF, const TargetRegisterClass *RC) in PredState() function
166 std::optional<PredState> PS;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 660 unsigned PredState = getRegState(PredOp) & ~RegState::Kill; in genCondTfrFor() local
669 .addReg(PredOp.getReg(), PredState, PredOp.getSubReg()) in genCondTfrFor()
674 .addReg(PredOp.getReg(), PredState, PredOp.getSubReg()) in genCondTfrFor()
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