| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | CFGUpdate.h | 71 SmallDenseMap<std::pair<NodePtr, NodePtr>, int, 4> Operations; variable 72 Operations.reserve(AllUpdates.size()); 80 Operations[{From, To}] += (U.getKind() == UpdateKind::Insert ? 1 : -1); 84 Result.reserve(Operations.size()); 85 for (auto &Op : Operations) { 102 Operations[{U.getFrom(), U.getTo()}] = int(i); 104 Operations[{U.getTo(), U.getFrom()}] = int(i); 108 const auto &OpA = Operations[{A.getFrom(), A.getTo()}]; 109 const auto &OpB = Operations[{B.getFrom(), B.getTo()}];
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/FuzzMutate/ |
| H A D | IRMutator.h | 90 std::vector<fuzzerop::OpDescriptor> Operations; variable 96 InjectorIRStrategy() : Operations(getDefaultOps()) {} in InjectorIRStrategy() 97 InjectorIRStrategy(std::vector<fuzzerop::OpDescriptor> &&Operations) in InjectorIRStrategy() argument 98 : Operations(std::move(Operations)) {} in InjectorIRStrategy() 103 return Operations.size(); in getWeight()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LowerExpectIntrinsic.cpp | 145 SmallVector<Instruction *, 4> Operations; in handlePhiDef() local 149 Operations.push_back(ZExt); in handlePhiDef() 155 Operations.push_back(SExt); in handlePhiDef() 168 Operations.push_back(BinOp); in handlePhiDef() 174 for (auto *Op : llvm::reverse(Operations)) { in handlePhiDef()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVFeatures.td | 76 "'Zicond' (Integer Conditional Operations)">; 79 "'Zicond' (Integer Conditional Operations)">; 108 "'Zimop' (May-Be-Operations)">; 111 "'Zimop' (May-Be-Operations)">; 362 "'Zcmop' (Compressed May-Be-Operations)", 366 "'Zcmop' (Compressed May-Be-Operations)">; 834 "'xtheadfmemidx' (T-Head FP Indexed Memory Operations)", 849 "'xtheadmemidx' (T-Head Indexed Memory Operations)">; 856 "'xtheadmempair' (T-Head two-GPR Memory Operations)">; 958 "'XCValu' (CORE-V ALU Operations)">; [all …]
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| H A D | RISCVInstrInfoZcmop.td | 10 // May-Be-Operations Extension (Zcmop).
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| H A D | RISCVInstrInfoZimop.td | 10 // May-Be-Operations Extension (Zimop).
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| H A D | RISCVScheduleV.td | 446 // 14. Vector Reduction Operations 672 // 14. Vector Reduction Operations 900 // 14. Vector Reduction Operations 1057 // 14. Vector Reduction Operations
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/net/ |
| H A D | ti,k3-am654-cpts.yaml | 24 - Ethernet Enhanced Scheduled Traffic Operations (CPTS_ESTFn) (TSN) 29 Scheduled Traffic Operations (CPTS_ESTFn) and PCIe Subsystem Precision Time
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrTDX.td | 25 // SEAMOPS - SEAM Operations
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SDNodeProperties.td | 11 // Selection DAG Pattern Operations
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/AST/ |
| H A D | OperationKinds.def | 1 //===--- OperationKinds.def - Operations Database ---------------*- C++ -*-===// 39 //===- Cast Operations ---------------------------------------------------===// 364 //===- Binary Operations -------------------------------------------------===// 418 //===- Unary Operations ---------------------------------------------------===//
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPC.td | 200 "Target supports Arithmetic Operations with Add fusion", 204 "Target supports Add with Logical Operations fusion", 208 "Target supports Logical with Add Operations fusion", 212 "Target supports Logical Operations fusion", 220 "Target supports Comparison Operations fusion",
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| H A D | README_P9.txt | 402 . Note: llvm has insertelem in "Vector Operations" 418 . Note: llvm has extractelement in "Vector Operations"
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| /freebsd-14.2/crypto/openssl/doc/man7/ |
| H A D | provider.pod | 88 I<operation_id> is an operation identity (see L</Operations> below). 100 =head2 Operations section in DESCRIPTION 102 Operations are referred to with numbers, via macros with names
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| /freebsd-14.2/tools/tools/crypto/ |
| H A D | README | 4 it computes the data rate achieved. Operations are carried out by
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| /freebsd-14.2/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | e500mc_power_isa.dtsi | 56 fsl,eref-deo; // Data Cache Extended Operations
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| H A D | e5500_power_isa.dtsi | 57 fsl,eref-deo; // Data Cache Extended Operations
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| H A D | e6500_power_isa.dtsi | 62 fsl,eref-deo; // Data Cache Extended Operations
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| /freebsd-14.2/contrib/netbsd-tests/ipf/regress/ |
| H A D | p6.whois | 5 Microsoft Corp., MSN Operations (MCMO) 156 Microsoft Corp., MSN Operations SAVV-S233052-4 (NET-216-35-66-88-1) 216.35.66.88 - 216.35.66.95
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonIntrinsicsV5.td | 225 // ALU32 / ALU / Logical Operations. 261 // CR / Logical Operations On Predicates.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.cpp | 1727 SmallVector<OperationIndices, 2> Operations; in costAndCollectOperands() local 1730 Operations.emplace_back(Opcode, 0, 0); in costAndCollectOperands() 1739 Operations.emplace_back(Opcode, MinIdx, MaxIdx); in costAndCollectOperands() 1746 Operations.emplace_back(Opcode, MinIdx, MaxIdx); in costAndCollectOperands() 1857 for (auto &CostOp : Operations) { in costAndCollectOperands()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedCyclone.td | 138 // Shifts and Bitfield Operations 290 // 7.8.14. Never-issued Instructions, Barrier and Hint Operations 473 // 7.9.4 Shifts and Bitfield Operations
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 543 ///// Memory Operations { 600 ///// } Memory Operations
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| /freebsd-14.2/crypto/openssl/doc/man3/ |
| H A D | EC_GROUP_new.pod | 89 Operations in a binary field are performed relative to an
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsAArch64.def | 74 // Memory Operations
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