| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | VTEmitter.cpp | 73 bool IsVector = VT->getValueAsInt("isVector"); in run() local
77 IsInteger && IsVector && !IsScalable); in run()
81 IsFP && IsVector && !IsScalable); in run()
83 UpdateVTRange("FIXEDLEN_VECTOR_VALUETYPE", Name, IsVector && !IsScalable); in run()
85 UpdateVTRange("VECTOR_VALUETYPE", Name, IsVector); in run()
86 UpdateVTRange("INTEGER_VALUETYPE", Name, IsInteger && !IsVector); in run()
87 UpdateVTRange("FP_VALUETYPE", Name, IsFP && !IsVector); in run()
98 << IsVector << ", " in run()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LowLevelType.h | 142 return isValid() && IsPointer && !IsVector; in isPointer()
145 constexpr bool isVector() const { return isValid() && IsVector; } in isVector()
260 if (IsVector) { in getScalarSizeInBits()
273 if (!IsVector) in getAddressSpace()
295 return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
364 uint64_t IsVector : 1;
385 constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
391 this->IsVector = IsVector;
395 else if (IsVector) {
420 ((uint64_t)IsPointer) << 1 | ((uint64_t)IsVector);
[all …]
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| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | SystemZ.cpp | 269 bool IsVector = false; in EmitVAArg() local
281 IsVector = ArgTy->isVectorTy(); in EmitVAArg()
286 if (IsVector && UnpaddedSize > PaddedSize) in EmitVAArg()
296 if (IsVector) { in EmitVAArg()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 518 bool isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
522 bool isConstFalseVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
527 int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
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| H A D | MachineIRBuilder.h | 724 bool IsVector,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LowLevelType.cpp | 32 IsVector = false; in LLT()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 164 bool IsVector = TII->isVector(MI); in runOnMachineFunction() local
166 if (!IsReduction && !IsVector && !IsCube) { in runOnMachineFunction()
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| H A D | AMDGPUInstructionSelector.cpp | 656 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR() local
676 if (IsVector) { in selectG_BUILD_VECTOR()
700 IsVector ? AMDGPU::VGPR_32RegClass : AMDGPU::SReg_32RegClass; in selectG_BUILD_VECTOR()
706 if (IsVector) { in selectG_BUILD_VECTOR()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMELFStreamer.cpp | 1403 const SmallVectorImpl<unsigned> &RegList, bool IsVector, in collectHWRegs() argument
1412 assert(Reg < (IsVector ? 32U : 16U) && "Register out of range"); in collectHWRegs()
1426 bool IsVector) { in emitRegSave() argument
1439 std::tie(Idx, Count) = collectHWRegs(MRI, Idx, RegList, IsVector, Mask); in emitRegSave()
1445 SPOffset -= Count * (IsVector ? 8 : 4); in emitRegSave()
1449 if (IsVector) in emitRegSave()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1463 bool llvm::isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector, in isConstTrueVal() argument
1465 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstTrueVal()
1477 bool IsVector, bool IsFP) { in isConstFalseVal() argument
1478 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstFalseVal()
1488 int64_t llvm::getICmpTrueVal(const TargetLowering &TLI, bool IsVector, in getICmpTrueVal() argument
1490 switch (TLI.getBooleanContents(IsVector, IsFP)) { in getICmpTrueVal()
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| H A D | MachineIRBuilder.cpp | 511 bool IsVector, in buildBoolExtInReg() argument
514 switch (TLI->getBooleanContents(IsVector, IsFP)) { in buildBoolExtInReg()
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| H A D | CombinerHelper.cpp | 3243 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue() argument
3246 isConstTrueVal(TLI, Cst, IsVector, IsFP); in isConstValidTrue()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/AsmParser/ |
| H A D | LLParser.h | 451 bool parseArrayVectorType(Type *&Result, bool IsVector);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 3238 bool LLParser::parseArrayVectorType(Type *&Result, bool IsVector) { in parseArrayVectorType() argument
3241 if (IsVector && Lex.getKind() == lltok::kw_vscale) { in parseArrayVectorType()
3265 if (parseToken(IsVector ? lltok::greater : lltok::rsquare, in parseArrayVectorType()
3269 if (IsVector) { in parseArrayVectorType()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExpr.cpp | 2060 bool IsVector = true) { in MaybeConvertMatrixAddress() argument
2062 if (ArrayTy && IsVector) { in MaybeConvertMatrixAddress()
2069 if (VectorTy && !IsVector) { in MaybeConvertMatrixAddress()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 483 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
11900 bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { in parseDirectiveRegSave() argument
11914 if (!IsVector && !Op.isRegList()) in parseDirectiveRegSave()
11916 if (IsVector && !Op.isDPRRegList()) in parseDirectiveRegSave()
11919 getTargetStreamer().emitRegSave(Op.getRegList(), IsVector); in parseDirectiveRegSave()
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