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Searched refs:ExtType (Results 1 – 25 of 53) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h61 struct ExtType { struct
64 ExtType() = default;
65 ExtType(char t, uint16_t w) : Type(t), Width(w) {} in ExtType() function
71 using RegExtMap = DenseMap<unsigned, ExtType>;
H A DHexagonBitTracker.cpp83 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); in HexagonEvaluator()
85 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); in HexagonEvaluator()
1241 if (F->second.Type == ExtType::SExt) in evaluateFormalCopy()
1243 else if (F->second.Type == ExtType::ZExt) in evaluateFormalCopy()
H A DHexagonISelDAGToDAG.cpp81 ISD::LoadExtType ExtType = LD->getExtensionType(); in INITIALIZE_PASS() local
82 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in INITIALIZE_PASS()
136 auto getExt64 = [this,ExtType] (MachineSDNode *N, const SDLoc &dl) in INITIALIZE_PASS()
138 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in INITIALIZE_PASS()
143 if (ExtType == ISD::SEXTLOAD) in INITIALIZE_PASS()
154 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { in INITIALIZE_PASS()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragments.td482 ISD::LoadExtType ExtType = LD->getExtensionType();
483 return ExtType == ISD::NON_EXTLOAD || ExtType == ISD::EXTLOAD ||
484 ExtType == ISD::ZEXTLOAD;
491 ISD::LoadExtType ExtType = LD->getExtensionType();
492 if (ExtType == ISD::NON_EXTLOAD)
494 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
501 ISD::LoadExtType ExtType = LD->getExtensionType();
502 if (ExtType == ISD::NON_EXTLOAD)
504 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
557 ISD::LoadExtType ExtType = LD->getExtensionType();
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1353 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1358 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1371 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1375 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1427 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1435 return getLoadVP(AM, ExtType, VT, dl, Chain, Ptr, Offset, Mask, EVL,
1451 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1456 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1477 SDValue getStridedLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
1494 return getStridedLoadVP(AM, ExtType, VT, DL, Chain, Ptr, Offset, Stride,
[all …]
H A DTargetLowering.h1392 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1399 unsigned Shift = 4 * ExtType; in getLoadExtAction()
1404 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1405 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1411 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1412 getLoadExtAction(ExtType, ValVT, MemVT) == Custom; in isLoadExtLegalOrCustom()
2476 void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, in setLoadExtAction() argument
2478 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() && in setLoadExtAction()
2481 unsigned Shift = 4 * ExtType; in setLoadExtAction()
2487 for (auto ExtType : ExtTypes) in setLoadExtAction() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td540 ISD::LoadExtType ExtType = LD->getExtensionType();
541 if (ExtType == ISD::NON_EXTLOAD)
543 if (ExtType == ISD::EXTLOAD)
550 ISD::LoadExtType ExtType = LD->getExtensionType();
551 if (ExtType == ISD::NON_EXTLOAD)
553 if (ExtType == ISD::EXTLOAD)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1276 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); in printArithExtend() local
1282 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend()
1286 ExtType == AArch64_AM::UXTX) || in printArithExtend()
1288 ExtType == AArch64_AM::UXTW) ) { in printArithExtend()
1296 O << ", " << AArch64_AM::getShiftExtendName(ExtType); in printArithExtend()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1890 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD() local
1936 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_VP_LOAD() local
2104 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD() local
2229 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecRes_Gather() local
2234 OpsLo, MMO, IndexTy, ExtType); in SplitVecRes_Gather()
5341 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD() local
5366 if (ExtType == ISD::NON_EXTLOAD && in WidenVecRes_LOAD()
5388 if (ExtType != ISD::NON_EXTLOAD) in WidenVecRes_LOAD()
5417 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_VP_LOAD() local
5473 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_MLOAD() local
[all …]
H A DSelectionDAG.cpp562 switch (ExtType) { in getExtForLoadExtType()
4834 unsigned ExtType = LD->getExtensionType(); in ComputeNumSignBits() local
4835 switch (ExtType) { in ComputeNumSignBits()
8505 ExtType = ISD::NON_EXTLOAD; in getLoad()
8506 } else if (ExtType == ISD::NON_EXTLOAD) { in getLoad()
8531 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO)); in getLoad()
8540 ExtType, MemVT, MMO); in getLoad()
8582 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad()
8772 ISD::LoadExtType ExtType, EVT VT, in getLoadVP() argument
8787 dl.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO)); in getLoadVP()
[all …]
H A DLegalizeIntegerTypes.cpp857 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD() local
873 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MLOAD() local
874 if (ExtType == ISD::NON_EXTLOAD) in PromoteIntRes_MLOAD()
875 ExtType = ISD::EXTLOAD; in PromoteIntRes_MLOAD()
895 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MGATHER() local
896 if (ExtType == ISD::NON_EXTLOAD) in PromoteIntRes_MGATHER()
897 ExtType = ISD::EXTLOAD; in PromoteIntRes_MGATHER()
905 ExtType); in PromoteIntRes_MGATHER()
3892 if (ExtType == ISD::SEXTLOAD) { in ExpandIntRes_LOAD()
3899 } else if (ExtType == ISD::ZEXTLOAD) { in ExpandIntRes_LOAD()
[all …]
H A DLegalizeDAG.cpp683 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps() local
684 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
749 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == in LegalizeLoadOps()
761 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
769 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
774 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) in LegalizeLoadOps()
862 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), in LegalizeLoadOps()
897 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT))) { in LegalizeLoadOps()
901 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
939 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
[all …]
H A DLegalizeVectorOps.cpp286 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp() local
288 if (LoadedVT.isVector() && ExtType != ISD::NON_EXTLOAD) in LegalizeOp()
289 Action = TLI.getLoadExtAction(ExtType, LD->getValueType(0), LoadedVT); in LegalizeOp()
/freebsd-14.2/contrib/llvm-project/clang/lib/Serialization/
H A DASTCommon.cpp218 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in TypeIdxFromBuiltin() argument
/freebsd-14.2/contrib/llvm-project/clang/lib/Index/
H A DUSRGeneration.cpp744 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in VisitType() argument
746 Out << "@BT@" << #ExtType; break; in VisitType()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp273 ISD::LoadExtType ExtType; in unpackFromMemLoc() local
279 ExtType = ISD::NON_EXTLOAD; in unpackFromMemLoc()
283 ExtType, DL, LocVT, Chain, FIN, in unpackFromMemLoc()
/freebsd-14.2/contrib/llvm-project/clang/include/clang/Serialization/
H A DASTBitCodes.h1081 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) PREDEF_TYPE_##Id##_ID, argument
/freebsd-14.2/contrib/llvm-project/clang/lib/AST/
H A DNSAPI.cpp468 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getNSNumberFactoryMethodKind() argument
H A DTypeLoc.cpp412 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getWrittenTypeSpec() argument
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h219 ISD::LoadExtType ExtType,
H A DR600ISelLowering.cpp1266 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad() local
1303 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1322 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD() local
1325 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp279 enum ExtType { enum
298 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
4284 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
4306 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
7331 Instruction::CastOps ExtType = Instruction::ZExt; in optimizeSwitchType() local
7334 ExtType = Instruction::SExt; in optimizeSwitchType()
7338 ExtType = Instruction::SExt; in optimizeSwitchType()
7340 ExtType = Instruction::ZExt; in optimizeSwitchType()
7343 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); in optimizeSwitchType()
7349 APInt WideConst = (ExtType == Instruction::ZExt) in optimizeSwitchType()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DCodeGenTypes.cpp436 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in ConvertType() argument
H A DCGDebugInfo.h80 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ argument
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp91 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::InvalidShiftExtend; member in __anon16c582f80111::AArch64FastISel::Address
106 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } in setExtendType()
107 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } in getExtendType()
217 unsigned RHSReg, AArch64_AM::ShiftExtendType ExtType,
1424 AArch64_AM::ShiftExtendType ExtType, in emitAddSub_rx() argument
1462 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()

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